An efficient technique to select logic nodes for single event transient pulse-width reduction

2013 ◽  
Vol 53 (1) ◽  
pp. 114-117 ◽  
Author(s):  
Nihaar N. Mahatme ◽  
Indranil Chatterjee ◽  
Akash Patki ◽  
Daniel B. Limbrick ◽  
Bharat L. Bhuva ◽  
...  
Keyword(s):  
Pulse Width ◽  
Efficient Technique ◽  
Single Event ◽  
Single Event Transient ◽  
Width Reduction

Analysis of single event transient pulse-width in 65 nm commercial radiation-hardened logic cell

2017 ◽  
Vol 38 (8) ◽  
pp. 085009 ◽  
Author(s):  
Haisong Li ◽  
Longsheng Wu ◽  
Bo Yang ◽  
Yihu Jiang
Keyword(s):  
Pulse Width ◽  
Single Event ◽  
Single Event Transient ◽  
Radiation Hardened

scholarly journals Research on temperature sensitivity of Single-event Transient pulse width in 28-nm bulk technology

2021 ◽  
Vol 2137 (1) ◽  
pp. 012031
Author(s):  
Bohan Zhang ◽  
Bin Liang ◽  
Yahao Fang
Keyword(s):  
Temperature Sensitivity ◽  
Pulse Width ◽  
Single Event ◽  
Single Event Transient ◽  
Worst Case ◽  
Deep Well ◽  
Influence Of Temperature On ◽  
Radiation Resistant ◽  
Bulk Technology ◽  
28 Nm

Abstract The influence of temperature on single-event transient (SET) pulse width has always been a hot issue in the field of anti-irradiation. Based on 3D-TCAD simulation, the temperature sensitivity of the SET pulse width of 28-nm bulk devices has been studied. The simulation results show that the electrical characteristics of the device shows an anti-temperature effect, but the worst case of SET pulse width still occurs at high temperature rather than low temperature. The influence of the triple-well structure on the temperature sensitivity of the SET pulse width has also been studied. The N+ deep well can significantly increase the SET pulse width when hitting NMOS device and enhance the temperature sensitivity of the SET pulse width. The research content of this article will provide reference for the design of radiation resistant chip.

Measurement of neutron-induced single event transient pulse width narrower than 100ps

2010 ◽  
Author(s):  
Hideyuki Nakamura ◽  
Katsuhiko Tanaka ◽  
Taiki Uemura ◽  
Kan Takeuchi ◽  
Toshikazu Fukuda ◽  
...  
Keyword(s):  
Pulse Width ◽  
Single Event ◽  
Single Event Transient

scholarly journals Supply Voltage and Temperature Dependence of Single-Event Transient in 28-nm FDSOI MOSFETs

Symmetry ◽  
2019 ◽  
Vol 11 (6) ◽  
pp. 793 ◽  
Author(s):  
Jingyan Xu ◽  
Yang Guo ◽  
Ruiqiang Song ◽  
Bin Liang ◽  
Yaqing Chi
Keyword(s):  
Temperature Dependence ◽  
Temperature Effect ◽  
Pulse Width ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Single Event ◽  
Single Event Transient ◽  
Short Channel ◽  
28 Nm

Based on three-dimensional (3D) technology computer aided design (TCAD) simulations, the supply voltage and temperature dependence of single-event transient (SET) pulse width in 28-nm fully-depleted silicon-on-insulator (FDSOI) metal-oxide-semiconductor field-effect transistors (MOSFETs) is investigated. FDSOI MOSFETs are symmetry devices with a superior control of the short channel effects (SCEs) and single-event effects (SEEs). Previous studies have suggested that the SET width is invariant when the temperature changes in FDSOI devices. Simulation results show that the SET pulse width increases as the supply voltage decreases. When the supply voltage is below 0.6 V, the SET pulse width increases sharply with the decrease of the supply voltage. The SET pulse width is not sensitive to temperature when the supply voltage is 1 V. However, when the supply voltage is 0.6 V or less, the SET pulse width exhibits an anti-temperature effect, and the anti-temperature effect is significantly enhanced as the supply voltage drops. Besides, the mechanism is analyzed from the aspects of saturation current and charge collection.

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