Dynamically adaptive register file architecture for energy reduction in embedded processors

Mohammad Khavari Tavana; Saba Ahmadian Khameneh; Maziar Goudarzi

doi:10.1016/j.micpro.2015.01.005

Dynamically adaptive register file architecture for energy reduction in embedded processors

Microprocessors and Microsystems ◽

10.1016/j.micpro.2015.01.005 ◽

2015 ◽

Vol 39 (2) ◽

pp. 49-63 ◽

Cited By ~ 6

Author(s):

Mohammad Khavari Tavana ◽

Saba Ahmadian Khameneh ◽

Maziar Goudarzi

Keyword(s):

Energy Reduction ◽

Embedded Processors ◽

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Exploiting Register-Usage for Saving Register-File Energy in Embedded Processors

Embedded and Ubiquitous Computing – EUC 2005 - Lecture Notes in Computer Science ◽

10.1007/11596356_7 ◽

2005 ◽

pp. 37-46 ◽

Cited By ~ 2

Author(s):

Wann-Yun Shieh ◽

Chien-Chen Chen

Keyword(s):

Embedded Processors ◽

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Power-Aware Compilation for Register File Energy Reduction

International Journal of Parallel Programming ◽

10.1023/b:ijpp.0000004510.66751.2e ◽

2003 ◽

Vol 31 (6) ◽

pp. 451-467 ◽

Cited By ~ 31

Author(s):

José L. Ayala ◽

Alexander Veidenbaum ◽

Marisa López-Vallejo

Keyword(s):

Energy Reduction ◽

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A. static and dynamic energy reduction technique for I-cache and BTB in embedded processors

ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) ◽

10.1109/aspdac.2004.1337709 ◽

2005 ◽

Cited By ~ 3

Author(s):

H. Sato ◽

T. Sato

Keyword(s):

Reduction Technique ◽

Energy Reduction ◽

Embedded Processors

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Very Wide Register: An Asymmetric Register File Organization for Low Power Embedded Processors

2007 Design, Automation & Test in Europe Conference & Exhibition ◽

10.1109/date.2007.364435 ◽

2007 ◽

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Author(s):

Praveen Raghavan ◽

Andy Lambrechts ◽

Murali Jayapala ◽

Francky Catthoor ◽

Diederik Verkest ◽

...

Keyword(s):

Low Power ◽

Embedded Processors ◽

File Organization

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Register File customization for low power embedded processors

2009 2nd IEEE International Conference on Computer Science and Information Technology ◽

10.1109/iccsit.2009.5234988 ◽

2009 ◽

Cited By ~ 1

Author(s):

Yu Zhou ◽

Hui Guo ◽

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Keyword(s):

Low Power ◽

Embedded Processors ◽

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Software-based register file vulnerability reduction for embedded processors

ACM Transactions on Embedded Computing Systems ◽

10.1145/2536747.2536760 ◽

2013 ◽

Vol 13 (1s) ◽

pp. 1-20 ◽

Cited By ~ 2

Author(s):

Jongeun Lee ◽

Aviral Shrivastava

Keyword(s):

Embedded Processors ◽

Vulnerability Reduction

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Reducing power consumption of embedded processors through register file partitioning and compiler support

2008 International Conference on Application-Specific Systems, Architectures and Processors ◽

10.1109/asap.2008.4580190 ◽

2008 ◽

Cited By ~ 16

Author(s):

Xuan Guan ◽

Yunsi Fei

Keyword(s):

Power Consumption ◽

Reducing Power ◽

Embedded Processors ◽

Compiler Support

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A Low Energy Soft Error-Tolerant Register File Architecture for Embedded Processors

2008 11th IEEE High Assurance Systems Engineering Symposium ◽

10.1109/hase.2008.46 ◽

2008 ◽

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Author(s):

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Keyword(s):

Soft Error ◽

Low Energy ◽

Embedded Processors ◽

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Power efficient register file update approach for embedded processors

2007 25th International Conference on Computer Design ◽

10.1109/iccd.2007.4601935 ◽

2007 ◽

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Author(s):

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Keyword(s):

Embedded Processors ◽

Power Efficient

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Register File Energy Reduction by Operand Data Reuse

Lecture Notes in Computer Science - Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation ◽

10.1007/3-540-45716-x_28 ◽

2002 ◽

pp. 278-288 ◽

Cited By ~ 1

Author(s):

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Keyword(s):

Data Reuse ◽

Energy Reduction ◽

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