Constraints on VLIW architectures

Loop fusion for clustered VLIW architectures

Proceedings of the joint conference on Languages, compilers and tools for embedded systems software and compilers for embedded systems - LCTES/SCOPES '02 ◽

10.1145/513829.513850 ◽

2002 ◽

Cited By ~ 9

Author(s):

Yi Qian ◽

Steve Carr ◽

Philip Sweany

Keyword(s):

Loop Fusion ◽

Vliw Architectures

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An instruction-level energy model for embedded VLIW architectures

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2002.801105 ◽

2002 ◽

Vol 21 (9) ◽

pp. 998-1010 ◽

Cited By ~ 24

Author(s):

M. Sami ◽

D. Sciuto ◽

C. Silvano ◽

V. Zaccaria

Keyword(s):

Energy Model ◽

Level Energy ◽

Vliw Architectures

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Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures

Proceedings of the international conference on Compilers, architecture, and synthesis for embedded systems - CASES '01 ◽

10.1145/502217.502241 ◽

2001 ◽

Cited By ~ 5

Author(s):

Marcio Buss ◽

Rodolfo Azevedo ◽

Paulo Centoducatte ◽

Guido Araujo

Keyword(s):

Functional Unit ◽

Vliw Architectures

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Cache Memory Energy Exploitation in VLIW Architectures

Advanced Techniques in Computing Sciences and Software Engineering ◽

10.1007/978-90-481-3660-5_60 ◽

2009 ◽

pp. 351-355

Author(s):

N. Mohamed ◽

N. Botros ◽

M. Alweh

Keyword(s):

Cache Memory ◽

Vliw Architectures ◽

Energy Exploitation

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PRMDL: a machine description language for clustered VLIW architectures

Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 ◽

10.1109/date.2001.915170 ◽

2002 ◽

Cited By ~ 3

Author(s):

A.S. Terechko ◽

E.J.D. Pol ◽

T.J. van Eijndhoven

Keyword(s):

Description Language ◽

Machine Description ◽

Vliw Architectures

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Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths

2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP) ◽

10.1109/asap.2015.7245732 ◽

2015 ◽

Cited By ~ 1

Author(s):

Erkan Diken ◽

Martin J. O'Riordan ◽

Roel Jordans ◽

Lech Jozwiak ◽

Henk Corporaal ◽

...

Keyword(s):

Code Generation ◽

Vliw Architectures

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Pragmatic integrated scheduling for clustered VLIW architectures

Software Practice and Experience ◽

10.1002/spe.826 ◽

2008 ◽

Vol 38 (3) ◽

pp. 227-257 ◽

Cited By ~ 5

Author(s):

Rahul Nagpal ◽

Y. N. Srikant

Keyword(s):

Integrated Scheduling ◽

Vliw Architectures

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Evaluation of Bus Based Interconnect Mechanisms in Clustered VLIW Architectures

International Journal of Parallel Programming ◽

10.1007/s10766-007-0045-2 ◽

2007 ◽

Vol 35 (6) ◽

pp. 507-527 ◽

Cited By ~ 1

Author(s):

Anup Gangwar ◽

M. Balakrishnan ◽

Preeti Ranjan Panda ◽

Anshul Kumar

Keyword(s):

Vliw Architectures

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Integrated assignment of registers and functional units for heterogeneous vliw-architectures

2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics ◽

10.1109/socc.2005.1554477 ◽

2005 ◽

Cited By ~ 1

Author(s):

T. Zeitlhofer ◽

B. Wess

Keyword(s):

Functional Units ◽

Vliw Architectures

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Optimizing the JPEG2000 binary arithmetic encoder for VLIW architectures

2004 IEEE International Conference on Acoustics, Speech, and Signal Processing ◽

10.1109/icassp.2004.1327061 ◽

2004 ◽

Cited By ~ 6

Author(s):

B. Valentine ◽

O. Sohm

Keyword(s):

Binary Arithmetic ◽

Vliw Architectures

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