scholarly journals High speed gold plating of integrated circuits

Gold Bulletin ◽  
1974 ◽  
Vol 7 (4) ◽  
pp. 107-107
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Gold Plating

Microfabrication research at the National Submicron Facility

1983 ◽  
Vol 41 ◽  
pp. 86-89
Author(s):  
E.D. Wolf
Keyword(s):  
Integrated Circuits ◽  
Particle Physics ◽  
High Speed ◽  
New Technology ◽  
High Energy ◽  
High Energy Particle ◽  
New Science ◽  
Wide Range ◽  
Intermediate Domain ◽  
Circuit Function

Most microelectronics devices and circuits operate faster, consume less power, execute more functions and cost less per circuit function when the feature-sizes internal to the devices and circuits are made smaller. This is part of the stimulus for the Very High-Speed Integrated Circuits (VHSIC) program. There is also a need for smaller, more sensitive sensors in a wide range of disciplines that includes electrochemistry, neurophysiology and ultra-high pressure solid state research. There is often fundamental new science (and sometimes new technology) to be revealed (and used) when a basic parameter such as size is extended to new dimensions, as is evident at the two extremes of smallness and largeness, high energy particle physics and cosmology, respectively. However, there is also a very important intermediate domain of size that spans from the diameter of a small cluster of atoms up to near one micrometer which may also have just as profound effects on society as “big” physics.

Structural changes in silicon-on-insulator material during post-implantation annealing

1986 ◽  
Vol 44 ◽  
pp. 736-737
Author(s):  
C. O. Jung ◽  
S. J. Krause ◽  
S.R. Wilson
Keyword(s):  
Integrated Circuits ◽  
Oxide Layer ◽  
High Speed ◽  
Structural Changes ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Quality ◽  
Radiation Hardened ◽  
Post Implantation ◽  
Very High

Silicon-on-insulator (SOI) structures have excellent potential for future use in radiation hardened and high speed integrated circuits. For device fabrication in SOI material a high quality superficial Si layer above a buried oxide layer is required. Recently, Celler et al. reported that post-implantation annealing of oxygen implanted SOI at very high temperatures would eliminate virtually all defects and precipiates in the superficial Si layer. In this work we are reporting on the effect of three different post implantation annealing cycles on the structure of oxygen implanted SOI samples which were implanted under the same conditions.

TEM study of phosphorus-implanted pseudomorphic Si0.88Ge0.12 on Si(100)

1995 ◽  
Vol 53 ◽  
pp. 468-469
Author(s):  
N. David Theodore ◽  
Donald Y.C Lie ◽  
J. H. Song ◽  
Peter Crozier
Keyword(s):  
Integrated Circuits ◽  
Heterojunction Bipolar Transistors ◽  
Integrated Circuit ◽  
High Speed ◽  
Room Temperature ◽  
Strain Relaxation ◽  
Bipolar Transistors ◽  
Sige Hbt ◽  
Integrated Circuit Manufacturing ◽  
Microstructural Behavior

SiGe is being extensively investigated for use in heterojunction bipolar-transistors (HBT) and high-speed integrated circuits. The material offers adjustable bandgaps, improved carrier mobilities over Si homostructures, and compatibility with Si-based integrated-circuit manufacturing. SiGe HBT performance can be improved by increasing the base-doping or by widening the base link-region by ion implantation. A problem that arises however is that implantation can enhance strain-relaxation of SiGe/Si.Furthermore, once misfit or threading dislocations result, the defects can give rise to recombination-generation in depletion regions of semiconductor devices. It is of relevance therefore to study the damage and anneal behavior of implanted SiGe layers. The present study investigates the microstructural behavior of phosphorus implanted pseudomorphic metastable Si0.88Ge0.12 films on silicon, exposed to various anneals.Metastable pseudomorphic Si0.88Ge0.12 films were grown ~265 nm thick on a silicon wafer by molecular-beam epitaxy. Pieces of this wafer were then implanted at room temperature with 100 keV phosphorus ions to a dose of 1.5×1015 cm-2.

The Radio Probe™: A New Measurement Tool for High Speed Integrated Circuits

2005 ◽  
Author(s):  
Mark Kimball
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Speed ◽  
Attenuation Factor ◽  
Cost Effective ◽  
Frequency Measurement ◽  
Single Frequency ◽  
Measurement Tool ◽  
Probe Design ◽  
Differential Measurement

Abstract This article presents a novel tool designed to allow circuit node measurements in a radio frequency (RF) integrated circuit. The discussion covers RF circuit problems; provides details on the Radio Probe design, which achieves an input impedance of 50Kohms and an overall attenuation factor of 0 dB; and describes signal to noise issues in the output signal, along with their improvement techniques. This cost-effective solution incorporates features that make it well suited to the task of differential measurement of circuit nodes within an RF IC. The Radio Probe concept offers a number of advantages compared to active probes. It is a single frequency measurement tool, so it complements, rather than replaces, active probes.

Electrical Probing and Surface Imaging of Deep Sub-Micron Integrated Circuits

1999 ◽  
Author(s):  
Kenneth Krieg ◽  
Richard Qi ◽  
Douglas Thomson ◽  
Greg Bridges
Keyword(s):  
High Resolution ◽  
Integrated Circuits ◽  
Real Time ◽  
High Speed ◽  
Time Signal ◽  
Surface Imaging ◽  
Atomic Force ◽  
Submicron Structures ◽  
High Resolution Images ◽  
Capacitive Loading

Abstract A contact probing system for surface imaging and real-time signal measurement of deep sub-micron integrated circuits is discussed. The probe fits on a standard probe-station and utilizes a conductive atomic force microscope tip to rapidly measure the surface topography and acquire real-time highfrequency signals from features as small as 0.18 micron. The micromachined probe structure minimizes parasitic coupling and the probe achieves a bandwidth greater than 3 GHz, with a capacitive loading of less than 120 fF. High-resolution images of submicron structures and waveforms acquired from high-speed devices are presented.

scholarly journals Analysis of the Propagation in High-Speed Interconnects for MIMICs by Means of the Method of Analytical Preconditioning: A New Highly Efficient Evaluation of the Coefficient Matrix

2021 ◽  
Vol 11 (3) ◽  
pp. 933
Author(s):  
Mario Lucido
Keyword(s):  
Integral Equation ◽  
Integrated Circuits ◽  
High Speed ◽  
Coefficient Matrix ◽  
Single Step ◽  
Integral Theorem ◽  
Acceleration Technique ◽  
Cauchy Integral Theorem ◽  
Integral Equation Formulation ◽  
High Speed Interconnects

The method of analytical preconditioning combines the discretization and the analytical regularization of a singular integral equation in a single step. In a recent paper by the author, such a method has been applied to a spectral domain integral equation formulation devised to analyze the propagation in polygonal cross-section microstrip lines, which are widely used as high-speed interconnects in monolithic microwave and millimeter waves integrated circuits. By choosing analytically Fourier transformable expansion functions reconstructing the behavior of the fields on the wedges, fast convergence is achieved, and the convolution integrals are expressed in closed form. However, the coefficient matrix elements are one-dimensional improper integrals of oscillating and, in the worst cases, slowly decaying functions. In this paper, a novel technique for the efficient evaluation of such kind of integrals is proposed. By means of a procedure based on Cauchy integral theorem, the general coefficient matrix element is written as a linear combination of fast converging integrals. As shown in the numerical results section, the proposed technique always outperforms the analytical asymptotic acceleration technique, especially when highly accurate solutions are required.

scholarly journals In-Plane Detection of Guided Surface Plasmons for High-Speed Optoelectronic Integrated Circuits

2017 ◽  
Vol 3 (1) ◽  
pp. 1700196 ◽  
Author(s):  
Evgeniy Panchenko ◽  
Jasper J. Cadusch ◽  
Ori Avayu ◽  
Tal Ellenbogen ◽  
Timothy D. James ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Surface Plasmons ◽  
High Speed ◽  
Optoelectronic Integrated Circuits
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