A novel simultaneous unipolar multispectral integrated technology approach for HgCdTe IR detectors and focal plane arrays

2001 ◽  
Vol 30 (6) ◽  
pp. 590-594 ◽  
Author(s):  
W. E. Tennant ◽  
M. Thomas ◽  
L. J. Kozlowski ◽  
W. V. McLevige ◽  
D. D. Edwall ◽  
...  
1995 ◽  
Vol 402 ◽  
Author(s):  
P. E. Hompson ◽  
M. Weeks ◽  
P. Tedrow ◽  
K. Hobart

AbstractEncouraging results have been reported for discrete heterojunction internal photoemission (HIP) infrared (IR) detectors composed of heavily boron doped Si1−3Gex layers on Si. We desired to build on those results and fabricate 640×480 IR focal plane arrays on 100 mm Si substrates, suitable for commercial microelectronic processing. In this paper we discuss the growth issues for growing these structures by molecular beam epitaxy. Since the wafers had already undergone processing and some had PtSi contacts, the growth temperature was constrained to be no greater than 600 °C. Precise temperature control was obtained by calibrating an optical pyrometer with a thermocouple embedded in the substrate heater assembly, which was calibrated using the eutectic emperatures of Au/Si and Al/Si. The final step of the cleaning process was a 1% HF dip/ spin dry, which resulted in a H-terminated surface. The H was removed at 550 °C in vacuum prior to rowth. The growth of the B-doped SiGe layer was done at 350 °C to minimize segregation and diffusion of the Ge and B. Doping levels of 2×1020/cm3 were obtained with near 100% activation. Using Si0.35, doped with 2×1020 B/cm3, a cut-off wavelength of 11.1 μm and an emission coefficient of 19.8 %/eV were obtained for discrete detectors. Preliminary results from the detector arrays show full functionality in the spectral range of 6.1 to 12.8 μm.


1995 ◽  
Vol 402 ◽  
Author(s):  
R. Strong ◽  
D. W. Greve ◽  
M. M. Weeks

AbstractHeterojunction p++ GeSi / Si internal photoemission (HIP) detectors deposited by ultra high vacuum chemical vapor deposition (UHV/CVD) were investigated as alternatives to silicide Schottky-barrier type detectors for infrared focal plane arrays. HIP structures were grown using SiH4, GeH4, and B2H6 source gases on (100) p- Si substrates patterned with thermal oxide windows. Selective epitaxy was maintained over a range of boron concentrations (6×1019 – 6.5×1020 cm-3) and Ge fractions (0.38–0.50), and a maximum selective thickness of ~300Å was determined for silicon growth at 550°C. These structures were fabricated into IR detectors using techniques compatible with standard Si focal plane array processing technology. Photoresponse data were analyzed according to the modified Fowler equation, indicating cut-off wavelengths of 5–12 (μm) and Cl values of 8–21 (%/eV) depending on sample parameters. I(V) characteristics were also measured at various temperatures, yielding electrical barrier heights consistent with optical measurements.


2006 ◽  
Author(s):  
Donald Butler ◽  
Zeynep Celik-Bulter

2010 ◽  
Author(s):  
Wendy L. Sarney ◽  
John W. Little ◽  
Kimberley A. Olver ◽  
Frank E. Livingston ◽  
Krisztian Niesz ◽  
...  

2015 ◽  
Vol 9 (1) ◽  
pp. 170-174 ◽  
Author(s):  
Xiaoling Zhang ◽  
Qingduan Meng ◽  
Liwen Zhang

The square checkerboard buckling deformation appearing in indium antimonide infrared focal-plane arrays (InSb IRFPAs) subjected to the thermal shock tests, results in the fracturing of the InSb chip, which restricts its final yield. In light of the proposed three-dimensional modeling, we proposed the method of thinning a silicon readout integrated circuit (ROIC) to level the uneven top surface of InSb IRFPAs. Simulation results show that when the silicon ROIC is thinned from 300 μm to 20 μm, the maximal displacement in the InSb IRFPAs linearly decreases from 7.115 μm to 0.670 μm in the upward direction, and also decreases linearly from 14.013 μm to 1.612 μm in the downward direction. Once the thickness of the silicon ROIC is less than 50 μm, the square checkerboard buckling deformation distribution presenting in the thicker InSb IRFPAs disappears, and the top surface of the InSb IRFPAs becomes flat. All these findings imply that the thickness of the silicon ROIC determines the degree of deformation in the InSb IRFPAs under a thermal shock test, that the method of thinning a silicon ROIC is suitable for decreasing the fracture probability of the InSb chip, and that this approach improves the reliability of InSb IRFPAs.


2019 ◽  
Vol 55 (4) ◽  
pp. 1-5 ◽  
Author(s):  
Fikri Oguz ◽  
Yetkin Arslan ◽  
Erkin Ulker ◽  
Alpan Bek ◽  
Ekmel Ozbay

2016 ◽  
Vol 52 (2) ◽  
pp. 203-209
Author(s):  
M. A. Dem’yanenko ◽  
A. I. Kozlov ◽  
A. R. Novoselov ◽  
V. N. Ovsyuk

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