Biasing a differential pair in low-voltage analog circuits: a systematic approach

1993 ◽  
Vol 3 (2) ◽  
pp. 119-125 ◽  
Author(s):  
Albert C. Van Der Woerd ◽  
Aarnout C. Pluygers
Keyword(s):  
Analog Circuits ◽  
Systematic Approach ◽  
Low Voltage ◽  
Differential Pair

DTMOS Technique for Low-Voltage Analog Circuits

2006 ◽  
Vol 14 (10) ◽  
pp. 1151-1156 ◽  
Author(s):  
M. Maymandi-Nejad ◽  
M. Sachdev
Keyword(s):  
Analog Circuits ◽  
Low Voltage

Low-Voltage and Low-Noise CMOS Analog Circuits Using Scaled Devices

2007 ◽  
Vol E90-C (6) ◽  
pp. 1149-1155
Author(s):  
A. IWATA ◽  
T. YOSHIDA ◽  
M. SASAKI
Keyword(s):  
Analog Circuits ◽  
Low Voltage ◽  
Low Noise ◽  
Cmos Analog Circuits

scholarly journals Low-voltage high-performance flexible digital and analog circuits based on ultrahigh-purity semiconducting carbon nanotubes

2019 ◽  
Vol 10 (1) ◽  
Author(s):  
Ting Lei ◽  
Lei-Lai Shao ◽  
Yu-Qing Zheng ◽  
Gregory Pitner ◽  
Guanhua Fang ◽  
...  
Keyword(s):  
Carbon Nanotubes ◽  
Analog Circuits ◽  
High Performance ◽  
Low Voltage

A new family of very low-voltage analog circuits based on quasi-floating-gate transistors

2003 ◽  
Vol 50 (5) ◽  
pp. 214-220 ◽  
Author(s):  
J. Ramirez-Angulo ◽  
C.A. Urquidi ◽  
R. Gonzalez-Carvajal ◽  
A. Torralba ◽  
A. Lopez-Martin
Keyword(s):  
Analog Circuits ◽  
Low Voltage ◽  
Floating Gate ◽  
New Family

Rotor Current Analysis on Transient Performance of Low Voltage Ride-Through of Doubly Fed Induction Generator

2014 ◽  
Vol 945-949 ◽  
pp. 2891-2894
Author(s):  
Wen Juan Zhang ◽  
Zhi Xia Han
Keyword(s):  
Systematic Approach ◽  
Low Voltage ◽  
Short Circuit ◽  
Theoretical Perspective ◽  
Doubly Fed Induction Generator ◽  
Low Voltage Ride Through ◽  
Three Phase ◽  
Steady State Current ◽  
Doubly Fed ◽  
Resistance Value

From a theoretical perspective, this paper develops a systematic approach to analyze the transient characteristics of the low voltage ride through in three-phase short-circuit rotor current. Firstly, the steady state current mathematical model of the system is described. And then, the short-circuit rotor current dynamic characteristic during the low voltage fault is analyzed, the resistance value and switching strategy of crowbar are discussed. Finally, the simulation results and the theoretical analysis manifest that appropriate crowbar reactance value and switching time can improve LVRT control characteristic and grid stability.

scholarly journals Multiple output CMOS current amplifier

2016 ◽  
Vol 64 (2) ◽  
pp. 301-306 ◽  
Author(s):  
B. Pankiewicz
Keyword(s):  
Low Voltage ◽  
Current Mirror ◽  
Mos Transistors ◽  
Output Current ◽  
Current Amplifier ◽  
Low Voltage Operation ◽  
Current Consumption ◽  
Current Follower ◽  
Differential Pair ◽  
A Current

Abstract In this paper the multiple output current amplifier basic cell is proposed. The triple output current mirror and current follower circuit are described in detail. The cell consists of a split nMOS differential pair and accompanying biasing current sources. It is suitable for low voltage operation and exhibits highly linear DC response. Through cell devices scaling, not only unity, but also any current gains are achievable. As examples, a current amplifier and bandpass biquad section designed in CMOS TSMC 90nm technology are presented. The current amplifier is powered from a 1.2V supply. MOS transistors scaling was chosen to obtain output gains equal to -2, 1 and 2. Simulated real gains are -1.941, 0.966 and 1.932 respectively. The 3dB passband obtained is above 20MHz, while current consumption is independent of input and output currents and is only 7.77μA. The bandpass biquad section utilises the previously presented amplifier, two capacitors and one resistor, and has a Q factor equal to 4 and pole frequency equal to 100 kHz.

Design of CNTFET-Based CCII Using gm/ID Technique for Low-Voltage and Low-Power Applications

2019 ◽  
Vol 29 (09) ◽  
pp. 2050143 ◽  
Author(s):  
Mohd Yasir ◽  
Naushad Alam
Keyword(s):  
Carbon Nanotube ◽  
Low Power ◽  
Analog Circuits ◽  
Low Voltage ◽  
Drain Current ◽  
Current Gain ◽  
Class Ab ◽  
Op Amp ◽  
Analog Ic ◽  
The Difference

This paper introduces for the first time all the steps required in the optimal design of carbon nanotube field-effect transistor (CNTFET)-based second generation current conveyor (CCII) using transconductance-to-drain current ratio ([Formula: see text]) technique for low-voltage (LV) and low-power (LP) applications. The [Formula: see text] technique is a well-established methodology for CMOS analog IC design. However, the difference between CMOS and CNTFET is that CMOS has continuous width while the width of CNTFET is discrete and depends on different parameters like the number of tubes, pitch and diameter ([Formula: see text]) of the carbon nanotube (CNT). Therefore, there is a need for a design technique by which one can easily design analog circuits using CNTFETs. The CCII is based on two-stage op-amp and two inverters used as class AB amplifiers. The performance of CCII has been extensively examined in terms of DC, AC and transient responses of node voltages, branch currents and node impedances using HSPICE simulations. The CCII operates at [Formula: see text]0.5[Formula: see text]V and has 172[Formula: see text][Formula: see text]W of power consumption. The designed CCII provides very high 3-dB bandwidth (BW) for current gain ([Formula: see text][Formula: see text]GHz as well as voltage gain ([Formula: see text][Formula: see text]GHz.

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