scholarly journals Hypergraph Model of Multi-residue Interactions in Proteins: Sequentially–Constrained Partitioning Algorithms for Optimization of Site-Directed Protein Recombination

Author(s):  
Xiaoduan Ye ◽  
Alan M. Friedman ◽  
Chris Bailey-Kellogg
VLSI Design ◽  
2002 ◽  
Vol 15 (2) ◽  
pp. 485-489
Author(s):  
Youssef Saab

Partitioning is a fundamental problem in the design of VLSI circuits. In recent years, ratio-cut partitioning has received attention due to its tendency to partition circuits into their natural clusters. Node contraction has also been shown to enhance the performance of iterative partitioning algorithms. This paper describes a new simple ratio-cut partitioning algorithm using node contraction. This new algorithm combines iterative improvement with progressive cluster formation. Under suitably mild assumptions, the new algorithm runs in linear time. It is also shown that the new algorithm compares favorably with previous approaches.


2020 ◽  
Author(s):  
Long Zhang ◽  
Hongliang Zhang ◽  
Chao Guo ◽  
Haitao Xu ◽  
Lingyang Song ◽  
...  

In this paper, a satellite-aerial integrated computing (SAIC) architecture in disasters is proposed, where the computation tasks from two-tier users, i.e., ground/aerial user equipments, are either locally executed at the high-altitude platforms (HAPs), or offloaded to and computed by the Low Earth Orbit (LEO) satellite. With the SAIC architecture, we study the problem of joint two-tier user association and offloading decision aiming at the maximization of the sum rate. The problem is formulated as a 0-1 integer linear programming problem which is NP-complete. A weighted 3-uniform hypergraph model is obtained to solve this problem by capturing the 3D mapping relation for two-tier users, HAPs, and the LEO satellite. Then, a 3D hypergraph matching algorithm using the local search is developed to find a maximum-weight subset of vertex-disjoint hyperedges. Simulation results show that the proposed algorithm has improved the sum rate when compared with the conventional greedy algorithm.


2019 ◽  
Vol 8 (2) ◽  
pp. 5589-5593

A VLSI integrated circuit is the most significant part of electronic systems such as personal computer or workstation, digital camera, cell phone or a portable computing device, and automobile. So development within the field of electronic space depends on the design planning of VLSI integrated circuit. Circuit partitioning is most important step in VLSI physical design process. Many heuristic partitioning algorithms are proposed for this problem. The first heuristic algorithm for hypergraph partitioning in the domain of VLSI is FM algorithm. In this paper, I have proposed three variations of FM algorithm by utilizing pair insightful swapping strategies. I have played out a relative investigation of FM and my proposed algorithms utilizing two datasets for example ISPD98 and ISPD99. Test results demonstrate that my proposed calculations outflank the FM algorithm.


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