Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width

Author(s):  
Guadalupe Miñana ◽  
Oscar Garnica ◽  
José Ignacio Hidalgo ◽  
Juan Lanchares ◽  
José Manuel Colmenar
1995 ◽  
Vol 23 (2) ◽  
pp. 117-125 ◽  
Author(s):  
Stéphan Jourdan ◽  
Pascal Sainrat ◽  
Daniel Litaize

Electronics ◽  
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Vol 3 (4) ◽  
pp. 661-674
Author(s):  
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Vol 6 (2) ◽  
pp. 1
Author(s):  
SEKHAR REDDY M. CHANDRA ◽  
REDDY P. RAMANA ◽  
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