Electrical and optical characterization of extended defects induced in p-type Si after Si ion implantation

2013 ◽  
Vol 11 (1) ◽  
pp. 146-149 ◽  
Author(s):  
Cloud Nyamhere ◽  
Fuccio Cristiano ◽  
Francios Olivie ◽  
Elena Bedel-Pereira ◽  
Zahi Essa
2000 ◽  
Vol 180 (1) ◽  
pp. 195-199 ◽  
Author(s):  
L. Gravier ◽  
H. Makino ◽  
K. Arai ◽  
H. Sasaki ◽  
K. Kimura ◽  
...  

Author(s):  
Shin'ichi Yamamura ◽  
Tadamasa Kimura ◽  
Shigemi Yugo ◽  
Riichiro Saito ◽  
Michio Murata ◽  
...  

1987 ◽  
Vol 97 ◽  
Author(s):  
H. Kong ◽  
H. J. Kim ◽  
J. A. Edmond ◽  
J. W. Palmour ◽  
J. Ryu ◽  
...  

ABSTRACTMonocrystalline β-SiC films have been chemically vapor deposited on Si(100) and c-SiC(0001) at 1660K-1823K and 0.1 MPa using SiH4 and C2H4 carried in H2. Films grown directly on Si(100) contained substantial concentrations of dislocations, stacking faults and antiphase boundaries (APB); those on α-SiC(0001) contained double positioning boundaries. Both the APBs and the double positioning boundaries were eliminated by using off-axis orientations of the respective substrates. Films produced on Si(100) have also been doped during growth and via ion implantation with B or Al (p-type) or P or N (n-type) at LN, room and elevated temperatures. Results from the former procedure showed the ionized dopant/total dopant concentration ratios for N, P, B and Al to be 0.1, 0.2, 0.002 and 0.01, respectively. The solubility limits of N, P and B at 1660K were determined to be ∼ 2E20, 1E18 and 8E18 cm−3, respectively; that of Al exceeds 2E19 cm−3. High temperature ion implantation coupled with dynamic and post annealing resulted in a markedly reduced defect concentration relative to that observed in similar research at the lower temperatures. Schottky diodes, p-n junctions, and MOSFET devices have been fabricated. The p-n junctions have the characteristics of insulators containing free carriers and deep level traps. The MOSFETs show very good I-V characteristics up to 673K, but have not been optimized.


2020 ◽  
Vol 568 (1) ◽  
pp. 62-70
Author(s):  
Aep Setiawan ◽  
Endah Kinarya Palupi ◽  
Rofiqul Umam ◽  
Husin Alatas ◽  
Irzaman

2003 ◽  
Vol 433-436 ◽  
pp. 337-340 ◽  
Author(s):  
Matthias Bickermann ◽  
Roland Weingärtner ◽  
Z.G. Herro ◽  
Dieter Hofmann ◽  
Ulrike Künecke ◽  
...  

1998 ◽  
Author(s):  
Alejandro Perez-Rodriguez ◽  
A. Romano-Rodriguez ◽  
Christoph Serre ◽  
L. Calvo-Barrio ◽  
O. Gonzalez-Varona ◽  
...  

1995 ◽  
Vol 378 ◽  
Author(s):  
Aditya Agarwal ◽  
S. Koveshnikov ◽  
K. Christensen ◽  
G. A. Rozgonyi

AbstractThe electrical properties of residual MeV ion implantation damage in Si after annealing from 600 to 1100°C for 1 hour have been investigated using Deep Level Transient Spectroscopy, Capaciatance-Voltage, and Current-Voltage measurements. These data have been correlated with structural defects imaged by Transmission Electron Microscopy. It is shown that at least 4 deep levels are associated with the buried layer of extended defects after annealing at 800, 900, 1000 and 1100°C. Additionally, for the wafer annealed at 800°C at least 5 more deep level centers are present in the device layer above the buried defects.


Sign in / Sign up

Export Citation Format

Share Document