scholarly journals Sampled grating tunable twin-guide laser diodes with wide tuning range (≥40 nm) and large output power (≥10 mW)

2006 ◽  
Vol 3 (3) ◽  
pp. 403-406
Author(s):  
R. Todt ◽  
T. Jacke ◽  
R. Meyer ◽  
J. Adler ◽  
R. Laroy ◽  
...  
2015 ◽  
Vol 36 (6) ◽  
pp. 065010 ◽  
Author(s):  
Jincan Zhang ◽  
Yuming Zhang ◽  
Hongliang Lü ◽  
Yimen Zhang ◽  
Bo Liu ◽  
...  

Author(s):  
Nils Pohl ◽  
Herbert Knapp ◽  
Christian Bredendiek ◽  
Rudolf Lachner

In this paper, radar transmitter circuits for next generation automotive radar sensors are presented. A 79 GHz radar transmitter with an output power of 14.5 dBm consuming only 165 mA (including frequency dividers) from a 3.3 V supply voltage clearly shows the advantage of using an improved SiGe technology with an fmax of 380 GHz. In addition, two radar transmitters for higher frequencies (around 150 GHz) based on frequency doubler circuits are showing the potential of SiGe technologies. The first transmitter achieves an output power of 3 dBm (single ended) at 144 GHz, whereas the second transmitters delivers a differential output power of 0 dBm at 150 GHz. Both transmitters achieve an ultra-wide tuning range of about 45 GHz.


2006 ◽  
Vol 4 ◽  
pp. 21-24 ◽  
Author(s):  
M. O. Olbrich ◽  
L. Huang ◽  
E. M. Biebl

Abstract. We present a low-cost 24 GHz VCO that is based on a microstrip design combined with discrete packaged devices. The output frequency is generated by a harmonic oscillator. The tunabilty was reached using a varactor diode. Two versions of the VCO were built, one has a wide tuning range of 1.1 GHz and the other one has a high output power of 3.7 dBm.


2020 ◽  
Vol 41 (10) ◽  
pp. 1279-1286
Author(s):  
Chang-da XU ◽  
◽  
Wei CHEN ◽  
De-chao BAN ◽  
Wen-hui SUN ◽  
...  

2005 ◽  
Vol 17 (12) ◽  
pp. 2514-2516 ◽  
Author(s):  
R. Todt ◽  
T. Jacke ◽  
R. Meyer ◽  
J. Adler ◽  
R. Laroy ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1382
Author(s):  
Xiaoying Deng ◽  
Huazhang Li ◽  
Mingcheng Zhu

Based on the idea of bisection method, a new structure of All-Digital Phased-Locked Loop (ADPLL) with fast-locking is proposed. The structure and locking method are different from the traditional ADPLLs. The Control Circuit consists of frequency compare module, mode-adjust module and control module, which is responsible for adjusting the frequency control word of digital-controlled-oscillator (DCO) by Bisection method according to the result of the frequency compare between reference clock and restructure clock. With a high frequency cascade structure, the DCO achieves wide tuning range and high resolution. The proposed ADPLL was designed in SMIC 180 nm CMOS process. The measured results show a lock range of 640-to-1920 MHz with a 40 MHz reference frequency. The ADPLL core occupies 0.04 mm2, and the power consumption is 29.48 mW, with a 1.8 V supply. The longest locking time is 23 reference cycles, 575 ns, at 1.92 GHz. When the ADPLL operates at 1.28 GHz–1.6 GHz, the locking time is the shortest, only 9 reference cycles, 225 ns. Compared with the recent high-performance ADPLLs, our design shows advantages of small area, short locking time, and wide tuning range.


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