Camera-based high frequency heterodyne lock-in carrierographic (frequency-domain photoluminescence) imaging of crystalline silicon wafers

2015 ◽  
Vol 213 (2) ◽  
pp. 405-411 ◽  
Author(s):  
Qiming Sun ◽  
Alexander Melnikov ◽  
Andreas Mandelis
Keyword(s):  
Frequency Domain ◽  
High Frequency ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Lock In

Recombination Characteristics of Single-Crystalline Silicon Wafers with a Damaged Near-Surface Layer

2013 ◽  
Vol 58 (2) ◽  
pp. 142-150 ◽  
Author(s):  
A.V. Sachenko ◽  
◽  
V.P. Kostylev ◽  
V.G. Litovchenko ◽  
V.G. Popov ◽  
...  
Keyword(s):  
Surface Layer ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Single Crystalline Silicon ◽  
Near Surface ◽  
Single Crystalline

Carrier Lifetime Measurements by Photoconductance at Low Temperature on Passivated Crystalline Silicon Wafers

2013 ◽  
Vol 1536 ◽  
pp. 119-125 ◽  
Author(s):  
Guillaume Courtois ◽  
Bastien Bruneau ◽  
Igor P. Sobkowicz ◽  
Antoine Salomon ◽  
Pere Roca i Cabarrocas
Keyword(s):  
Low Temperature ◽  
Electron Mobility ◽  
Carrier Density ◽  
Carrier Lifetime ◽  
Minority Carrier ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Doping Density ◽  
Lifetime Measurements ◽  
Effective Lifetime

ABSTRACTWe propose an implementation of the PCD technique to minority carrier effective lifetime assessment in crystalline silicon at 77K. We focus here on (n)-type, FZ, polished wafers passivated by a-Si:H deposited by PECVD at 200°C. The samples were immersed into liquid N2 contained in a beaker placed on a Sinton lifetime tester. Prior to be converted into lifetimes, data were corrected for the height shift induced by the beaker. One issue lied in obtaining the sum of carrier mobilities at 77K. From dark conductance measurements performed on the lifetime tester, we extracted an electron mobility of 1.1x104 cm².V-1.s-1 at 77K, the doping density being independently calculated in order to account for the freezing effect of dopants. This way, we could obtain lifetime curves with respect to the carrier density. Effective lifetimes obtained at 77K proved to be significantly lower than at RT and not to depend upon the doping of the a-Si:H layers. We were also able to experimentally verify the expected rise in the implied Voc, which, on symmetrically passivated wafers, went up from 0.72V at RT to 1.04V at 77K under 1 sun equivalent illumination.

Efficient interpolation of high-frequency domain data by phase smoothing

Radio Science ◽  
2008 ◽  
Vol 43 (4) ◽  
pp. n/a-n/a
Author(s):  
Jie Yang ◽  
Mary C. Taylor ◽  
Yu Zhang ◽  
Tapan K. Sarkar
Keyword(s):  
Frequency Domain ◽  
High Frequency

Micro Electrical Discharge Machining Thermal Effect on Micro-Cracks Generation on Silicon Material

2021 ◽  
Vol 1047 ◽  
pp. 41-49
Author(s):  
Xiao Zhong Song
Keyword(s):  
Electrical Discharge Machining ◽  
Crystalline Silicon ◽  
Local Area ◽  
Silicon Wafers ◽  
Adverse Side Effect ◽  
Micro Edm ◽  
Crystalline Orientation ◽  
Surface Machining ◽  
Crack Generation ◽  
Micro Cracks

Various novel 3D micro machining technologies were researched and developed for silicon micro mechanical system fabrication. Micro EDM is one of them. The material removal mechanism is thermal sparking erosion and is completely independent with regards to the crystalline orientation of silicon, therefore there is no orientation constraint in processing the complex 3D geometry of silicon wafers. As thermal sparking implied, the process features local area high temperature melting and evaporating, and this characteristic has an adverse side-effect on the sparked surface integrity. One important concern is the generation of micro cracks, which would provide an adverse effect on the fatigue life of the micro feature element made of silicon. For this consideration, in this paper, with the experiment and SEM picture analysis approach, the author explored the micro crack generation characteristics on mono crystalline silicon wafers under micro EDM with available sparking energies and on the different crystal orientation surface machining. The generation of micro cracking is not only related with the sparking energy but also related with the crystalline orientation. The {100} orientation is the strongest surface to resist crack generation. For a strong-doped P type silicon wafer, there exists a maximum crack energy threshold. If single sparking energy is over this threshold, micro cracks unavoidably would be generated on any orientation surface. Two types of chemical etching post processes that can remove cracks on sparked surfaces are also tested and discussed.

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