scholarly journals Solar Cells: Corrugation Architecture Enabled Ultraflexible Wafer-Scale High-Efficiency Monocrystalline Silicon Solar Cell (Adv. Energy Mater. 12/2018)

2018 ◽  
Vol 8 (12) ◽  
pp. 1870055
Author(s):  
Rabab R. Bahabry ◽  
Arwa T. Kutbee ◽  
Sherjeel M. Khan ◽  
Adrian C. Sepulveda ◽  
Irmandy Wicaksono ◽  
...  
2018 ◽  
Vol 8 (12) ◽  
pp. 1702221 ◽  
Author(s):  
Rabab R. Bahabry ◽  
Arwa T. Kutbee ◽  
Sherjeel M. Khan ◽  
Adrian C. Sepulveda ◽  
Irmandy Wicaksono ◽  
...  

Author(s):  
Satya Narayan Mourya ◽  
Pankaj Gupta ◽  
Skand Trivedi

The three dimensional photovoltaic cell is revolutionary silicon solar cell, design to maximize the conversion of sunlight into electricity. It is like container rather than plane conventional solar cell and has ‘High Efficiency Design to produce 200% of the Power Output of the Conventional Solar Cells’. Three dimensional solar has a special feature on the surface to capture more light in the morning and evening hours, as well as in the winter months when the sun is not directly overhead. Unlike conventional solar cells where electrical contact wires run on the top of the cell, blocking sunlight, three dimensional solar cell use a network of contact wires run below the light collector. Solar Tree is energy generating and harvesting tree, in order to increase efficiency “SPIRALLING PHYLLATAXY” technique is applied. It is way of mounting the three dimensional solar panel (leaf) on the top such a way that maximum sunlight incident on it. It can be applied in street lightening system, industrial power supply etc. It is much better than traditional photovoltaic solar system in area point of viewandalso more efficient. It is perfect solution for future energy needandFibonacci Sequence SolarTree is one of advance solar tree. After using three dimensional solar cell in solar tree, the investment payback period of solar panel systems is40%more than conventional solar panel systems.


2011 ◽  
Vol 239-242 ◽  
pp. 1322-1325
Author(s):  
Xian Fang Gou ◽  
Peng Wang ◽  
Li Kai Jiang ◽  
Shuang Song ◽  
Ying Xu

Alkaline etchants was a conventional process in monocrystalline silicon texturing. In the paper, A new etchant,Sodium Dodecyl Sulfonate (CH3(CH2)10CH2SO3Na) solution, was firstly applied to texture monocrystalline silicon used for solar cells. Uniform pyramids about 2µm in the wafer of monocrystalline silicon were formed with low concentration of Sodium Dodecyl Sulfonate (CH3(CH2)10CH2SO3Na)at 75°C for 20min. This etchant has a lot of advantage, such as low cost, no pollution and good reproducibility, so maybe is suitable for the 1arge-scale production.


2012 ◽  
Vol 476-478 ◽  
pp. 1815-1819 ◽  
Author(s):  
Jing Wei Chen ◽  
Lei Zhao ◽  
Su Zhou ◽  
Hong Wei Diao ◽  
Ye Hua Tang ◽  
...  

Pyramidal texture is one traditional method to realize antireflection for c-Si solar cells, due to its low cost and simplicity. As one high efficiency silicon solar cell, amorphous/crystalline silicon heterojunction (SHJ) solar cell has attracted much attention all over the world. The heterojunction interface with very low defects and interface states is critical to the SHJ solar cell performance. In order to obtain high quality interface passivation by depositing a very thin intrinsic amorphous silicon layer on the textured Si conformally, large size pyramidal texture with no metal ion contamination is required. In this work, we utilized tetra-methyl ammonium hydroxide (TMAH) instead of NaOH in the alkaline etching to prepare pyramidal texture on N-type monocrystalline silicon to avoid the possible Na+ contamination. By optimizing the etching conditions, uniform large size pyramidal texture with pyramid size of about 10 μm was fabricated successfully. Furthermore, excellent antireflection performance was demonstrated on such textured Si surface. The average reflectance was lower than 10% in the visible and near infrared spectrum range. Such pyramidally textured Si wafers will be very suitable for SHJ solar cells.


1996 ◽  
Vol 426 ◽  
Author(s):  
Robert B. Hall ◽  
Allen M. Barnett ◽  
Jeff E. Cotter ◽  
David H. Ford ◽  
Alan E. Ingram ◽  
...  

AbstractThin, polycrystalline silicon solar cells have the potential for the realization of a 15%, lowcost photovoltaic product. As a photovoltaic material, polycrystalline material is abundant, benign, and electrically stable. The thin-film polycrystalline silicon solar cell design achieves high efficiency by incorporating techniques to enhance optical absorption, ensure electrical confinement, and minimize bulk recombination currents. AstroPower's approach to a thin-film polycrystalline silicon solar cell technology is based on the Silicon-Film™ process, a continuous sheet manufacturing process for the growth of thin films of polycrystalline silicon on low-cost substrates. A new barrier layer and substrate have been developed for advanced solar cell designs. External gettering with phosphorus has been employed to effect significant improvements leading to effective minority carrier diffusion lengths greater than 250 micrometers in the active silicon layer. Light trapping has been observed in 60-micrometer thick films of silicon grown on the new barrier-coated substrate. An efficiency of 12.2% in a 0.659 cm2 solar cell has been achieved with the advanced structure.


Energies ◽  
2021 ◽  
Vol 14 (3) ◽  
pp. 592
Author(s):  
Myeong Sang Jeong ◽  
Yonghwan Lee ◽  
Ka-Hyun Kim ◽  
Sungjin Choi ◽  
Min Gu Kang ◽  
...  

In the fabrication of crystalline silicon solar cells, the contact properties between the front metal electrode and silicon are one of the most important parameters for achieving high-efficiency, as it is an integral element in the formation of solar cell electrodes. This entails an increase in the surface recombination velocity and a drop in the open-circuit voltage of the solar cell; hence, controlling the recombination velocity at the metal-silicon interface becomes a critical factor in the process. In this study, the distribution of Ag crystallites formed on the silicon-metal interface, the surface recombination velocity in the silicon-metal interface and the resulting changes in the performance of the Passivated Emitter and Rear Contact (PERC) solar cells were analyzed by controlling the firing temperature. The Ag crystallite distribution gradually increased corresponding to a firing temperature increase from 850 ∘C to 950 ∘C. The surface recombination velocity at the silicon-metal interface increased from 353 to 599 cm/s and the open-circuit voltage of the PERC solar cell decreased from 659.7 to 647 mV. Technology Computer-Aided Design (TCAD) simulation was used for detailed analysis on the effect of the surface recombination velocity at the silicon-metal interface on the PERC solar cell performance. Simulations showed that the increase in the distribution of Ag crystallites and surface recombination velocity at the silicon-metal interface played an important role in the decrease of open-circuit voltage of the PERC solar cell at temperatures of 850–900 ∘C, whereas the damage caused by the emitter over fire was determined as the main cause of the voltage drop at 950 ∘C. These results are expected to serve as a steppingstone for further research on improvement in the silicon-metal interface properties of silicon-based solar cells and investigation on high-efficiency solar cells.


2006 ◽  
Vol 910 ◽  
Author(s):  
Qi Wang ◽  
Matt P. Page ◽  
Eugene Iwancizko ◽  
Yueqin Xu ◽  
Yanfa Yan ◽  
...  

AbstractWe have achieved an independently-confirmed 17.8% conversion efficiency in a 1-cm2, p-type, float-zone silicon (FZ-Si) based heterojunction solar cell. Both the front emitter and back contact are hydrogenated amorphous silicon (a-Si:H) deposited by hot-wire chemical vapor deposition (HWCVD). This is the highest reported efficiency for a HWCVD silicon heterojunction (SHJ) solar cell. Two main improvements lead to our most recent increases in efficiency: 1) the use of textured Si wafers, and 2) the application of a-Si:H heterojunctions on both sides of the cell. Despite the use of textured c-Si to increase the short-circuit current, we were able to maintain the same 0.65 V open-circuit voltage as on flat c-Si. This is achieved by coating a-Si:H conformally on the c-Si surfaces, including covering the tips of the anisotropically-etched pyramids. A brief atomic H treatment before emitter deposition is not necessary on the textured wafers, though it was helpful in the flat wafers. It is essential to high efficiency SHJ solar cells that the emitter grows abruptly as amorphous silicon, instead of as microcrystalline or epitaxial Si. The contact on each side of the cell comprises a thin (< 5 nm) low substrate temperature (~100°C) intrinsic a-Si:H layer, followed by a doped layer. Our intrinsic layers are deposited at 0.3-1.2 nm/s. The doped emitter and back-contact layers were deposited at a higher temperature (>200°C) and grown from PH3/SiH4/H2 and B2H6/SiH4/H2 doping gas mixtures, respectively. This combination of low (intrinsic) and high (doped layer) growth temperatures was optimized by lifetime and surface recombination velocity measurements. Our rapid efficiency advance suggests that HWCVD may have advantages over plasma-enhanced (PE) CVD in fabrication of high-efficiency heterojunction c-Si cells; there is no need for process optimization to avoid plasma damage to the delicate, high-quality, Si wafers.


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