Organic Thin-Film Transistors with Anodized Gate Dielectric Patterned by Self-Aligned Embossing on Flexible Substrates

2012 ◽  
Vol 22 (6) ◽  
pp. 1209-1214 ◽  
Author(s):  
Yiheng Qin ◽  
Daniël H. Turkenburg ◽  
Ionut Barbu ◽  
Wiljan T. T. Smaal ◽  
Kris Myny ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Organic Thin Film Transistors ◽  
Flexible Substrates ◽  
Organic Thin Film

SuPR-NaP Technique for Printing Ultrafine Silver Electrodes and its Use for Low-Voltage Operation of Organic Thin-Film Transistors

MRS Advances ◽  
2018 ◽  
Vol 3 (49) ◽  
pp. 2931-2936
Author(s):  
G. Kitahara ◽  
K. Aoshima ◽  
J. Tsutsumi ◽  
H. Minemawari ◽  
S. Arai ◽  
...  
Keyword(s):  
Thin Film ◽  
Dielectric Layer ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Voltage ◽  
Organic Thin Film Transistors ◽  
Base Layer ◽  
Organic Thin Film ◽  
Low Voltage Operation ◽  
Silver Electrodes

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.

Densely cross-linked polysiloxane dielectric for organic thin-film transistors with enhanced electrical stability

2019 ◽  
Vol 7 (19) ◽  
pp. 5821-5829 ◽  
Author(s):  
Joo-Young Kim ◽  
Eun Kyung Lee ◽  
Jiyoung Jung ◽  
Don-Wook Lee ◽  
Youngjun Yun ◽  
...  
Keyword(s):  
Thin Film ◽  
Hybrid Material ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Organic Thin Film Transistors ◽  
Cross Linking ◽  
Urethane Acrylate ◽  
Organic Thin Film ◽  
Electrical Stability ◽  
Inorganic Hybrid

A solution-processable organic–inorganic hybrid material composed of a polysiloxane urethane acrylate composite (PSUAC) was developed through a dual cross-linking mechanism and satisfies all the requirements for use as a gate dielectric for flexible organic thin-film transistors (OTFTs).

Pentacene Organic Thin-Film Transistors with Dual-Gate Structure

2007 ◽  
Vol 124-126 ◽  
pp. 383-386
Author(s):  
Jae Bon Koo ◽  
Jung Wook Lim ◽  
Chan Hoe Ku ◽  
Sang Chul Lim ◽  
Jung Hun Lee ◽  
...  
Keyword(s):  
Thin Film ◽  
Electrostatic Potential ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Atomic Layer ◽  
Organic Thin Film Transistors ◽  
Organic Thin Film ◽  
Gate Structure ◽  
Dual Gate ◽  
Bottom Gate

We report on the fabrication of dual-gate pentacene organic thin-film transistors (OTFTs) using a plasma-enhanced atomic layer deposited (PEALD) 150 nm thick Al2O3 as a bottom gate dielectric and a 300 nm thick parylene or a PEALD 200 nm thick Al2O3 as both a top gate dielectric and a passivation layer. The threshold voltage (Vth) of OTFT with a 300 nm thick parylene as a top gate dielectric is changed from 4.7 V to 1.3 V and that with a PEALD 200 nm thick Al2O3 as a top gate dielectric is changed from 1.95 V to -9.8 V when the voltage bias of top gate electrode is changed from -10 V to 10 V. The change of Vth of OTFT with the dual-gate structure has been successfully understood by an analysis of electrostatic potential.

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