System-level scheduling of real-time streaming applications using a semi-partitioned approach

Author(s):  
Emanuele Cannella ◽  
Mohamed A. Bamakhrama ◽  
Todor Stefanov
Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 644
Author(s):  
Michal Frivaldsky ◽  
Jan Morgos ◽  
Michal Prazenica ◽  
Kristian Takacs

In this paper, we describe a procedure for designing an accurate simulation model using a price-wised linear approach referred to as the power semiconductor converters of a DC microgrid concept. Initially, the selection of topologies of individual power stage blocs are identified. Due to the requirements for verifying the accuracy of the simulation model, physical samples of power converters are realized with a power ratio of 1:10. The focus was on optimization of operational parameters such as real-time behavior (variable waveforms within a time domain), efficiency, and the voltage/current ripples. The approach was compared to real-time operation and efficiency performance was evaluated showing the accuracy and suitability of the presented approach. The results show the potential for developing complex smart grid simulation models, with a high level of accuracy, and thus the possibility to investigate various operational scenarios and the impact of power converter characteristics on the performance of a smart gird. Two possible operational scenarios of the proposed smart grid concept are evaluated and demonstrate that an accurate hardware-in-the-loop (HIL) system can be designed.


Author(s):  
Maniru Malami Umar ◽  
Amimu Mohammed ◽  
Abubakar Roko ◽  
Ahmed Yusuf Tambuwal ◽  
Abdulhakeem Abdulazeez

Call admission control (CAC) is one of the radio resource management techniques that regulates and provide resources for new or ongoing calls in the network. The existing CAC schemes wastes bandwidth due to its failure to check before degrading admitted real-time calls and it also increases the call dropping probability (CBP) and calling blocking probability (CBP) of real-time calls due to the delay incurred when bandwidth is degraded from them. This paper proposed an enhanced adaptive call admission control (EA-CAC) scheme with bandwidth reservation. The scheme employs a prior-check mechanism that ensured bandwidth to be degraded will be enough to admit the new call request. It further incorporates an adaptive degradation mechanism that degrades non-real time calls before degrading the RT calls. The performance of the EA-CAC scheme was evaluated against two existing schemes using Vienna LTE system level simulator. The EA-CAC scheme exhibits better performance compared to the two schemes in terms of throughput, CBP, and CDP of RT calls without sacrificing the performance of NRT calls.


Author(s):  
Zhenyang Lei ◽  
Xiangdong Lei ◽  
Jun Long

Shared resources on the multicore chip, such as main memory, are increasingly becoming a point of contention. Traditional real-time task scheduling policies focus on solely on the CPU, and do not take in account memory access and cache effects. In this paper, we propose parallel real-time tasks scheduling (PRTTS) policy on multicore platforms. Each set of tasks is represented as a directed acyclic graph (DAG). The priorities of tasks are assigned according to task periods Rate Monotonic (RM). Each task is composed of three phases. The first phase is read memory stage, the second phase is execution phase and the third phase is write memory phase. The tasks use locks and critical sections to protect data access. The global scheduler maintains the task pool in which tasks are ready to be executed which can run on any core. PRTTS scheduling policy consists of two levels: the first level scheduling schedules ready real-time tasks in the task pool to cores, and the second level scheduling schedules real-time tasks on cores. Tasks can preempt the core on running tasks of low priority. The priorities of tasks which want to access memory are dynamically increased above all tasks that do not access memory. When the data accessed by a task is in the cache, the priority of the task is raised to the highest priority, and the task is scheduled immediately to preempt the core on running the task not accessing memory. After accessing memory, the priority of these tasks is restored to the original priority and these tasks are pended, the preempted task continues to run on the core. This paper analyzes the schedulability of PRTTS scheduling policy. We derive an upper-bound on the worst-case response-time for parallel real-time tasks. A series of extensive simulation experiments have been performed to evaluate the performance of proposed PRTTS scheduling policy. The results of simulation experiment show that PRTTS scheduling policy offers better performance in terms of core utilization and schedulability rate of tasks.


2021 ◽  
Author(s):  
Joni Rasanen ◽  
Aaro Altonen ◽  
Alexandre Mercat ◽  
Jarno Vanne

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