Self-aligned metal double-gate junctionless p-channel low-temperature polycrystalline-germanium thin-film transistor with thin germanium film on glass substrate

Akito Hara; Yuya Nishimura; Hiroki Ohsawa

doi:10.7567/jjap.56.03bb01

Self-aligned metal double-gate junctionless p-channel low-temperature polycrystalline-germanium thin-film transistor with thin germanium film on glass substrate

Japanese Journal of Applied Physics ◽

10.7567/jjap.56.03bb01 ◽

2016 ◽

Vol 56 (3S) ◽

pp. 03BB01 ◽

Cited By ~ 8

Author(s):

Akito Hara ◽

Yuya Nishimura ◽

Hiroki Ohsawa

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistor ◽

Double Gate ◽

Germanium Film

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Erratum: “Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate”

Japanese Journal of Applied Physics ◽

10.7567/jjap.56.129207 ◽

2017 ◽

Vol 56 (12) ◽

pp. 129207

Author(s):

Hiroki Ohsawa ◽

Shun Sasaki ◽

Akito Hara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Silicon Thin Film

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Low-temperature metal double-gate junctionless p-channel polycrystalline-germanium thin-film transistors with high-k gate dielectric on glass substrate

2015 22nd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) ◽

10.1109/am-fpd.2015.7173250 ◽

2015 ◽

Cited By ~ 1

Author(s):

Yuya Nishimura ◽

Shota Nibe ◽

Akito Hara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Gate Dielectric ◽

Double Gate ◽

High K ◽

High K Gate Dielectric

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Self-Aligned Planar Metal Double-Gate Polycrystalline-Silicon Thin-Film Transistors Fabricated at Low Temperature on Glass Substrate

IEICE Transactions on Electronics ◽

10.1587/transele.e96.c.285 ◽

2013 ◽

Vol E96.C (2) ◽

pp. 285-288 ◽

Cited By ~ 5

Author(s):

Hiroyuki OGATA ◽

Kenji ICHIJO ◽

Kenji KONDO ◽

Akito HARA

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Silicon Thin Film

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Self-Aligned Metal Double-Gate Low-Temperature Polycrystalline Silicon Thin-Film Transistors on Glass Substrate Using Back-Surface Exposure

Japanese Journal of Applied Physics ◽

10.7567/jjap.50.021401 ◽

2011 ◽

Vol 50 (2R) ◽

pp. 021401 ◽

Cited By ~ 6

Author(s):

Akito Hara ◽

Tadashi Sato ◽

Kenji Kondo ◽

Kenta Hirose ◽

Kuninori Kitahara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Back Surface ◽

Double Gate ◽

Silicon Thin Film

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Extended-Gate pH Sensors Using Self-Aligned Four-Terminal Metal Double-Gate Low-Temperature Polycrystalline-Silicon Thin-Film Transistors on Glass Substrate

ECS Meeting Abstracts ◽

10.1149/ma2016-02/33/2154 ◽

2016 ◽

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Ph Sensors ◽

Silicon Thin Film

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Self-aligned metal double-gate junctionless p-channel low-temperature polycrystalline-germanium thin-film transistors with a thin germanium channel on a glass substrate

2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) ◽

10.1109/am-fpd.2016.7543640 ◽

2016 ◽

Author(s):

Akito Hara ◽

Yuya Nishimura ◽

Hiroki Ohsawa

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Double Gate

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Controllability of self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on a glass substrate

Japanese Journal of Applied Physics ◽

10.7567/jjap.55.03cc01 ◽

2016 ◽

Vol 55 (3S1) ◽

pp. 03CC01 ◽

Cited By ~ 3

Author(s):

Hiroki Ohsawa ◽

Shun Sasaki ◽

Akito Hara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Silicon Thin Film

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Evaluation of pH sensors using self-aligned four-terminal planar embedded metal double-gate low-temperature polycrystalline-silicon thin-film transistors on glass substrate

2016 23rd International Workshop on Active-Matrix Flatpanel Displays and Devices (AM-FPD) ◽

10.1109/am-fpd.2016.7543602 ◽

2016 ◽

Author(s):

Hiroki Ohsawa ◽

Hitoshi Suzuki ◽

Satoko Kuwano ◽

Akito Hara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Ph Sensors ◽

Silicon Thin Film

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Extended-Gate pH Sensors Using Self-Aligned Four-Terminal Metal Double-Gate Low-Temperature Polycrystalline-Silicon Thin-Film Transistors on Glass Substrate

ECS Transactions ◽

10.1149/07510.0253ecst ◽

2016 ◽

Vol 75 (10) ◽

pp. 253-260

Author(s):

H. Ohsawa ◽

A. Hara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Double Gate ◽

Ph Sensors ◽

Silicon Thin Film

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Self-Aligned Metal Double-Gate Low-Temperature Polycrystalline Silicon Thin-Film Transistors on Glass Substrate Using Back-Surface Exposure

Japanese Journal of Applied Physics ◽

10.1143/jjap.50.021401 ◽

2011 ◽

Vol 50 (2) ◽

pp. 021401 ◽

Cited By ~ 2

Author(s):

Akito Hara ◽

Tadashi Sato ◽

Kenji Kondo ◽

Kenta Hirose ◽

Kuninori Kitahara

Keyword(s):

Thin Film ◽

Low Temperature ◽

Glass Substrate ◽

Thin Film Transistors ◽

Polycrystalline Silicon ◽

Back Surface ◽

Double Gate ◽

Silicon Thin Film

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