Electro-static discharge failure analysis and design optimization of gate-driver on array circuit in InGaZnO thin film transistor backplane
Keyword(s):
Keyword(s):
2010 ◽
Vol 77
(4)
◽
pp. 660-670
◽
Keyword(s):
2016 ◽
Vol 63
(6)
◽
pp. 2405-2411
◽
2018 ◽
Vol 111
◽
pp. 147-156
Keyword(s):