scholarly journals Efficient VLSI Architecture for Memetic Vector Quantizer Design

10.5772/37368 ◽  
2012 ◽  
Author(s):  
Chien-Min Ou ◽  
Wen-Jyi Hwang
Keyword(s):  
Vlsi Architecture ◽  
Vector Quantizer

A LEARNING PARALLEL ANALOG-TO-DIGITAL VECTOR QUANTIZER

1998 ◽  
Vol 08 (05n06) ◽  
pp. 605-614 ◽  
Author(s):  
JEREMY LUBKIN ◽  
GERT CAUWENBERGHS
Keyword(s):  
Vlsi Architecture ◽  
Mos Transistors ◽  
Resonance Theory ◽  
Self Organizing Maps ◽  
Adaptive Resonance ◽  
Analog To Digital ◽  
Vector Quantizer ◽  
Digital Format ◽  
Analog Memory ◽  
On Chip

A mixed-mode VLSI architecture for learning vector quantization (LVQ), with on-chip adaptation and dynamic storage of the analog templates, converts analog vectorial data in parallel to digital format. The architecture is digitally configurable, and extends to commonly used algorithms for codebook adaptation besides k-means clustering such as Fuzzy Adaptive Resonance Theory (ART) and Kohonen self-organizing maps. The analog memory and adaptive element of the LVQ cell comprise 6 MOS transistors and one capacitor, and provide for robust self-refresh of the dynamic analog storage. Total cell size including distance and adaptive computations is 80×70 lambda in scalable MOSIS technology. Experimental results from a fabricated 16×16 cell prototype in 2μm CMOS are included.

scholarly journals A full-pipelined 2-D IDCT/IDST VLSI architecture with adaptive block-size for HEVC standard

2013 ◽  
Vol 10 (9) ◽  
pp. 20130210-20130210 ◽  
Author(s):  
Hong Liang ◽  
He Weifeng ◽  
Zhu Hui ◽  
Mao Zhigang
Keyword(s):  
Block Size ◽  
Vlsi Architecture

An Efficient NLMS-based VLSI Architecture for Robust FECG Extraction and FHR Processing

2020 ◽  
Author(s):  
Patricia U. L. da Costa ◽  
Guilherme Paim ◽  
Leandro Rocha ◽  
Eduardo da Costa ◽  
Sergio Almeida ◽  
...  
Keyword(s):  
Vlsi Architecture
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