scholarly journals Graphics Processor-based High Performance Pattern Matching Mechanism for Network Intrusion Detection

10.5772/15203 ◽  
2011 ◽  
Author(s):  
Nen-Fu Huang ◽  
Yen-Ming Chu ◽  
Hsien-Wen Hsu
Keyword(s):  
Intrusion Detection ◽  
Pattern Matching ◽  
High Performance ◽  
Network Intrusion Detection ◽  
Graphics Processor ◽  
Network Intrusion ◽  
Matching Mechanism ◽  
Performance Pattern

A Studying on Implementation of NIDS Pattern Matching Based on FPGA

2011 ◽  
Vol 403-408 ◽  
pp. 1985-1988
Author(s):  
Jing Jiao Li ◽  
Ho Cholman ◽  
Yong Chen ◽  
Song Ho Pak
Keyword(s):  
Intrusion Detection ◽  
Pattern Matching ◽  
High Throughput ◽  
High Performance ◽  
Low Cost ◽  
Network Intrusion Detection ◽  
Application Area ◽  
Network Intrusion ◽  
Rule Set ◽  
Matching Performance

Intrusion detection for network security is an application area demanding high throughput. The pattern matching in intrusion detection requires extremely high performance to process string matching. Most of pattern matching using software has many time complexities and cannot reach the requirements of high throughput. The pattern matching using hardware considerably improves the speed of matching and has several other advantages. This paper describes a FPGA-based pattern matching architecture, using hashing method called XOR Hashing. The proposed method updates new patterns without reconfiguration and processes the collision and has high matching performance. The proposed system implements the pattern matching by using Snort rule-set, an open source Network Intrusion Detection and has simulation processing on PC. Compared with existing hardware method, the results explained that our method has relatively high performance for the pattern matching and can else process the pattern matching with high performance on low–cost FPGA device.

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