scholarly journals Some remarks about flux linkage and inductance

2005 ◽  
Vol 2 ◽  
pp. 39-44 ◽  
Author(s):  
S. Kurz
Keyword(s):  
Circuit Simulation ◽  
Differential Forms ◽  
Nonlinear Behaviour ◽  
Magnetic Media ◽  
Flux Linkage ◽  
Circuit Element ◽  
Modern Language ◽  
Electromagnetic Devices ◽  
Increasing Demand ◽  
Field Device

Abstract. In the area of computational electromagnetics there is an increasing demand for various coupled simulations. One example is the coupling between field and circuit simulation for the description of electromagnetic devices. In the context of such couplings, theoretical questions arise as well. How can a field device be represented as an equivalent multiport circuit element? What is meant by flux linkage if the considered conductors are not filamentary? What is meant by inductance if the magnetic media exhibit nonlinear behaviour? These questions and their answers are not new. However, according to the author’s view, these issues are not sufficiently addressed in the usual textbooks. The aim of the paper is therefore to (hopefully) answer the questions concisely and correctly. The modern language of differential forms will be employed for this purpose.

scholarly journals Marching On-In-Time Unstructured PEEC Method for Electrically Large Structures with Conductive, Dielectric, and Magnetic Media

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 242
Author(s):  
Riccardo Torchio ◽  
Dimitri Voltolina ◽  
Paolo Bettini ◽  
Federico Moro ◽  
Piergiorgio Alotto
Keyword(s):  
Computation Time ◽  
Industrial Test ◽  
Magnetic Media ◽  
Neutral Beam Injector ◽  
Transient Phenomena ◽  
Electromagnetic Problems ◽  
Inverse Discrete Fourier Transform ◽  
Electromagnetic Devices ◽  
Vector Potentials ◽  
Fusion Applications

The Marching On-In-Time (MOT) unstructured Partial Element Equivalent Circuit (PEEC) method for time domain electromagnetic problems is presented. The method allows the transient analysis of electrically large electromagnetic devices consisting of conductive, dielectric, and magnetic media coupled with external lumped circuits. By re-formulating PEEC following the Coulombian interpretation of magnetization phenomena and by using electric and magnetic vector potentials, the proposed approach allows for a completely equivalent treatment of electric and magnetic media and inhomogeneous and anisotropic materials are accounted for as well. With respect to the recently proposed Marching On-In-Time PEEC approach, based on the standard (structured) discretization of PEEC, the method presented in this paper uses a different space and time MOT discretization, which allows for a reduction in the number of the unknowns. Analytical and industrial test cases consisting in electrically large devices are considered (e.g., the model of a Neutral Beam Injector adopted in thermonuclear fusion applications). Results obtained from the simulations show that the proposed method is accurate and yields good performances. Moreover, when rich harmonic content transient phenomena are considered, the unstructured MOT–PEEC method allows for a significant reduction of the memory and computation time when compared to techniques based on Inverse Discrete Fourier Transform applied to the frequency domain unstructured PEEC approach.

scholarly journals Nanostructured Materials in Information Storage

MRS Bulletin ◽  
2008 ◽  
Vol 33 (9) ◽  
pp. 831-837 ◽  
Author(s):  
Zvonimir Z. Bandić ◽  
Dmitri Litvinov ◽  
M. Rooks
Keyword(s):  
Self Assembly ◽  
Flash Memory ◽  
Cost Effective ◽  
Information Storage ◽  
Magnetic Memory ◽  
Magnetic Media ◽  
Patterned Media ◽  
Nanoscale Fabrication ◽  
Increasing Demand ◽  
Silicon Based

AbstractThe ever-increasing demand for information storage has pushed research and development of nonvolatile memories, particularly magnetic disk drives and silicon-based memories, to areal densities where bit sizes are approaching nanometer dimensions. At this level, material and device phenomena make further scaling increasingly difficult. The difficulties are illustrated in the examples of magnetic media and flash memory, such as thermal instability of sub-100-nm bits in magnetic memory and charge retention in flash memory, and solutions are discussed in the form of patterned media and crosspoint memories. The materials-based difficulties are replaced by nanofabrication challenges, requiring the introduction of new techniques such as nanoimprinting lithography for cost-effective manufacturing and self-assembly for fabrication on the sub-25-nm scale. Articles in this issue describe block-copolymer lithographic fabrication of patterned media, materials studies on the scaling limits of phase-change-based crosspoint memories, nanoscale fabrication using imprint lithography, and biologically inspired protein-based memory.

scholarly journals Electrical equivalent circuit for modelling permanent magnet synchronous motors

2021 ◽  
Vol 72 (3) ◽  
pp. 176-183
Author(s):  
Esra Kandemir Beser
Keyword(s):  
Permanent Magnet ◽  
Equivalent Circuit ◽  
Circuit Simulation ◽  
Electrical Circuit ◽  
Simulation Program ◽  
Mechanical Parameters ◽  
Circuit Element ◽  
Electrical Equivalent Circuit ◽  
Mechanical Part ◽  
Simulation Results

Abstract In permanent magnet synchronous motor (PMSM) models, only the stator part is given as an electrical circuit and mechanical equations are used for modelling the mechanical part of the machine. In this study, electrical equivalents of mechanical equations are also obtained and mechanical parameters of a PMSM are expressed as an electrical circuit element. In this way, an exact electrical equivalent circuit is proposed in which both the stator and the mechanical part can be modelled as an electrical circuit for the PMSMs dynamic model. Although PMSM model includes mechanical parameters and variables, the complete model is expressed only in electrical elements and variables. The proposed PMSM circuit was simulated for different load torques in the circuit simulation program. Simulation results show that the proposed circuit operates like a PMSM. Simulation results were verified by another method in the form of solution of the differential equations that constitute the mathematical model of PMSM. Due to the proposed circuit that enables the conversion of mechanical parameters into electrical parameters, PMSM can be modelled and simulated as an electrical circuit with completely electrical elements in a circuit simulation program.

The interface between device and circuit design

1985 ◽  
Vol 63 (6) ◽  
pp. 699-701
Author(s):  
R. C. Foss ◽  
A. L. Silburt
Keyword(s):  
Integrated Circuits ◽  
Circuit Simulation ◽  
Performance Standards ◽  
High Volume ◽  
Circuit Element ◽  
Proper Understanding ◽  
User Input ◽  
High Volume Production ◽  
Volume Production ◽  
Simulation Task

A proper understanding of transistor and other circuit-element behavior is critical in the design process of integrated circuits intended for high-volume production or exacting performance standards. Models of such elements are a key ingredient in the circuit-simulation task, which provides design-verification feedback to chip designers. Failures in this process can have costly consequences. Much of the effort put into modelling work contributes very little to real needs as practical failures are usually at the much more gross level of user input or program-coding problems.

GENERAL SPICE MODELS FOR MEMRISTOR AND APPLICATION TO CIRCUIT SIMULATION OF MEMRISTOR-BASED SYNAPSES AND MEMORY CELLS

2010 ◽  
Vol 19 (02) ◽  
pp. 407-424 ◽  
Author(s):  
MOHAMMAD JAVAD SHARIFI ◽  
YASSER MOHAMMADI BANADAKI
Keyword(s):  
Nonvolatile Memory ◽  
Circuit Simulation ◽  
Logic Gate ◽  
Memory Cell ◽  
Model Parameters ◽  
Programmable Logic ◽  
Circuit Element ◽  
Hewlett Packard ◽  
Gate Circuit ◽  
First Time

Memristor had been first theorized nearly 40 years ago by Prof. Chua, as the fourth fundamental circuit element beside the three existing elements (Resistor, Capacitor and Inductor) but because no one has succeeded in building a memristor, it has long remained a theoretical element. Some months ago, Hewlett-Packard (hp) announced it created a memristor using a TiO2/TiO2-X structure. In this paper, the characteristics, structures and relations for the invented hp's memristor are briefly reviewed and then two general SPICE models for the charge-controlled and flux-controlled memristors are introduced for the first time. By adjusting the model parameters to the hp's memristor characteristics some circuit properties of the device are studied and then two important memristor applications as the memory cell in a nonvolatile-RAM structure and as the synapse in an artificial neural network are studied. By utilizing the introduced models and designing the appropriate circuits for two most important applications; a nonvolatile memory structure and a programmable logic gate, circuit simulations are done and the results are presented.

scholarly journals Simple circuit equivalents for the constant phase element

PLoS ONE ◽  
2021 ◽  
Vol 16 (3) ◽  
pp. e0248786
Author(s):  
Sverre Holm ◽  
Thomas Holm ◽  
Ørjan Grøttem Martinsen
Keyword(s):  
Constant Phase Element ◽  
Circuit Simulation ◽  
Power Laws ◽  
Voltage Response ◽  
Time Varying ◽  
Circuit Element ◽  
Independent Verification ◽  
Frequency Independent ◽  
Rc Circuit ◽  
The Time Domain

The constant phase element (CPE) is a capacitive element with a frequency-independent negative phase between current and voltage which interpolates between a capacitor and a resistor. It is used extensively to model the complexity of the physics in e.g. the bioimpedance and electrochemistry fields. There is also a similar element with a positive phase angle, and both the capacitive and inductive CPEs are members of the family of fractional circuit elements or fractance. The physical meaning of the CPE is only partially understood and many consider it an idealized circuit element. The goal here is to provide alternative equivalent circuits, which may give rise to better interpretations of the fractance. Both the capacitive and the inductive CPEs can be interpreted in the time-domain, where the impulse and step responses are temporal power laws. Here we show that the current impulse responses of the capacitive CPE is the same as that of a simple time-varying series RL-circuit where the inductor’s value increases linearly with time. Similarly, the voltage response of the inductive CPE corresponds to that of a simple parallel RC circuit where the capacitor’s value increases linearly with time. We use the Micro-Cap circuit simulation program, which can handle time-varying circuits, for independent verification. The simulation corresponds exactly to the expected response from the proposed equivalents within 0.1% error. The realization with time-varying components correlates with known time-varying properties in applications, and may lead to a better understanding of the link between CPE and applications.

scholarly journals The fourth element: characteristics, modelling and electromagnetic theory of the memristor

2010 ◽  
Vol 466 (2120) ◽  
pp. 2175-2202 ◽  
Author(s):  
O. Kavehei ◽  
A. Iqbal ◽  
Y. S. Kim ◽  
K. Eshraghian ◽  
S. F. Al-Sarawi ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Electromagnetic Theory ◽  
Flux Linkage ◽  
Circuit Element ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Reduction In Area ◽  
Application Specific ◽  
Insight Into

In 2008, researchers at the Hewlett–Packard (HP) laboratories published a paper in Nature reporting the development of a new basic circuit element that completes the missing link between charge and flux linkage, which was postulated by Chua in 1971 (Chua 1971 IEEE Trans. Circuit Theory 18 , 507–519 ( doi:10.1109/TCT.1971.1083337 )). The HP memristor is based on a nanometre scale TiO 2 thin film, containing a— doped region and an undoped region. Further to proposed applications of memristors in artificial biological systems and non-volatile RAM, they also enable reconfigurable nanoelectronics. Moreover, memristors provide new paradigms in application-specific integrated circuits and field programmable gate arrays. A significant reduction in area with an unprecedented memory capacity and device density are the potential advantages of memristors for integrated circuits. This work reviews the memristor and provides mathematical and SPICE models for memristors. Insight into the memristor device is given via recalling the quasi-static expansion of Maxwell’s equations. We also review Chua’s arguments based on electromagnetic theory.

A SPICE MODEL OF THE PEO-PANI MEMRISTOR

2013 ◽  
Vol 23 (06) ◽  
pp. 1350112 ◽  
Author(s):  
GERARD DAVID HOWARD ◽  
LARRY BULL ◽  
BEN DE LACY COSTELLO ◽  
ANDREW ADAMATZKY ◽  
VICTOR EROKHIN
Keyword(s):  
Circuit Simulation ◽  
Logic Circuits ◽  
Short Description ◽  
Experimental Results ◽  
Next Generation ◽  
Circuit Element ◽  
Design Decisions ◽  
Spice Model ◽  
Activity Dependent ◽  
Analog Logic

The memristor is a novel circuit element which is capable of maintaining an activity-dependent nonvolatile resistance and is therefore a candidate for use in next-generation storage and logic circuits. In this article, we present a model of the PEO-PANI memristor for use in the SPICE circuit simulation program which is especially suited to analog logic applications. Two variants are presented herein; accompanying each is a short description that explains any design decisions made, as well as elucidating on preferred simulation settings. It is shown that the model accurately replicates corresponding experimental results found in the literature. Simple simulations are used to show the suitability of each variant to specific experimental usage. Appendices contain verbatim implementations of the SPICE models.

Proceedings of The Modern Language Association of America

PMLA ◽  
1935 ◽  
Vol 50 (4) ◽  
pp. 1343-1343
Keyword(s):  
Modern Language Association ◽  
Modern Language ◽  
Local Committee ◽  
Tuesday Morning ◽  
University Of Cincinnati ◽  
The University ◽  
Plaza Hotel

The fifty-second meeting of the Modern Language Associationof America was held, on the invitation of the University of Cincinnati, at Cincinnati, Ohio, Monday, Tuesday, and Wednesday, December 30 and 31, 1935, and January 1, 1936. The Association headquarters were in the Netherland Plaza Hotel, where all meetings were held except those of Tuesday morning and afternoon. These took place at the University of Cincinnati. Registration cards at headquarters were signed by about 900, though a considerably larger number of members were in attendance. The Local Committee estimated the attendance at not less than 1400. This Committee consisted of Professor Frank W. Chandler, Chairman; Professor Edwin H. Zeydel; Professor Phillip Ogden; Mr. John J. Rowe (for the Directors); and Mr. Joseph S. Graydon (for the Alumni).

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