Comparative Performance Analysis of Low Power Full Adder Design in Different Logics in 22nm Scaling Technology

Murali A; Santosh Kumar L.V; Rajesh P

doi:10.5121/ijci.2016.5428

Comparative Performance Analysis of Low Power Full Adder Design in Different Logics in 22nm Scaling Technology

International Journal on Cybernetics & Informatics ◽

10.5121/ijci.2016.5428 ◽

2016 ◽

Vol 5 (4) ◽

pp. 255-269

Author(s):

Murali A ◽

Santosh Kumar L.V ◽

Rajesh P

Keyword(s):

Performance Analysis ◽

Low Power ◽

Full Adder ◽

Comparative Performance

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Comparative performance analysis of XOR-XNOR function based high-speed CMOS full adder circuits

2014 International Conference on Reliability Optimization and Information Technology (ICROIT) ◽

10.1109/icroit.2014.6798369 ◽

2014 ◽

Cited By ~ 1

Author(s):

Bhavani Prasad Y. ◽

Harish Babu N. ◽

Ramana Reddy K.V. ◽

Dhanabal R

Keyword(s):

Performance Analysis ◽

High Speed ◽

Full Adder ◽

Comparative Performance

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Comparative performance analysis and complementary triode based CMFB circuits for fully differential class AB symmetrical OTAs with low power consumption

International Journal of Circuit Theory and Applications ◽

10.1002/cta.2123 ◽

2015 ◽

Vol 44 (5) ◽

pp. 1039-1054 ◽

Cited By ~ 11

Author(s):

Francesco Centurelli ◽

Pietro Monsurrò ◽

Alessandro Trifiletti

Keyword(s):

Performance Analysis ◽

Power Consumption ◽

Low Power ◽

Low Power Consumption ◽

Comparative Performance ◽

Class Ab ◽

Fully Differential

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Performance Analysis and Comparison of Low Power Various Full Adder Circuits

Communications in Computer and Information Science - Communication, Networks and Computing ◽

10.1007/978-981-16-8896-6_25 ◽

2021 ◽

pp. 312-321

Author(s):

Ekta Jadon ◽

Shyam Akashe

Keyword(s):

Performance Analysis ◽

Low Power ◽

Full Adder

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Performance analysis of a low power high speed full adder

2017 2nd International Conference on Telecommunication and Networks (TEL-NET) ◽

10.1109/tel-net.2017.8343543 ◽

2017 ◽

Cited By ~ 1

Author(s):

Paro Bajpai ◽

Priyanka Mittal ◽

Amita Rana ◽

Bhupesh Aneja

Keyword(s):

Performance Analysis ◽

Low Power ◽

High Speed ◽

Full Adder

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A Comparative Performance Analysis of Low Power Bypassing Array Multipliers

International Journal of Information Technology and Computer Science ◽

10.5815/ijitcs.2013.08.04 ◽

2013 ◽

Vol 5 (8) ◽

pp. 38-45

Author(s):

Nirlakalla Ravi ◽

S. Venkateswarlu ◽

T. Jayachandra Prasad ◽

Thota Subba Rao

Keyword(s):

Performance Analysis ◽

Low Power ◽

Comparative Performance ◽

Array Multipliers

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Comparative Performance Analysis of High Speed Low Power Area Efficient FIR Adaptive Filter

IEIE Transactions on Smart Processing and Computing ◽

10.5573/ieiespc.2014.3.5.267 ◽

2014 ◽

Vol 3 (5) ◽

pp. 267-270

Author(s):

Manish Jaiswal

Keyword(s):

Performance Analysis ◽

Low Power ◽

Adaptive Filter ◽

High Speed ◽

Comparative Performance ◽

Area Efficient

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Overview and Comparative Performance Analysis of Various Full Adder Cells in 90 nm Technology

2018 4th International Conference on Computing Communication and Automation (ICCCA) ◽

10.1109/ccaa.2018.8777684 ◽

2018 ◽

Cited By ~ 6

Author(s):

Mehedi Hasan ◽

Md. Jobayer Hossein ◽

Uttam Kumar Saha ◽

Md Shahariar Tarif

Keyword(s):

Performance Analysis ◽

Full Adder ◽

Comparative Performance

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Comparative Performance analysis of XOR-XNOR cell used in Hybrid Logic based Full adder

2021 International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT) ◽

10.1109/icaect49130.2021.9392544 ◽

2021 ◽

Author(s):

Abhay Kumar Gautam ◽

Karuppanan P ◽

Shriteja K Reddy ◽

Manmath Suryavanshi

Keyword(s):

Performance Analysis ◽

Full Adder ◽

Hybrid Logic ◽

Comparative Performance

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Comparative Performance Analysis of RPL for Low Power and Lossy Networks based on Different Objective Functions

International Journal of Advanced Computer Science and Applications ◽

10.14569/ijacsa.2019.0100524 ◽

2019 ◽

Vol 10 (5) ◽

Author(s):

Mah Zaib Jamil ◽

Danista Khan ◽

Adeel Saleem ◽

Kashif Mehmood ◽

Atif Iqbal

Keyword(s):

Performance Analysis ◽

Low Power ◽

Objective Functions ◽

Lossy Networks ◽

Comparative Performance

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Comparative Performance Analysis of XOR-XNOR Function Based High-Speed CMOS Full Adder Circuits For Low Voltage VLSI Design

International Journal of VLSI Design & Communication Systems ◽

10.5121/vlsic.2012.3219 ◽

2012 ◽

Vol 3 (2) ◽

pp. 221-242 ◽

Cited By ~ 17

Author(s):

Subodh Wairya

Keyword(s):

Performance Analysis ◽

High Speed ◽

Low Voltage ◽

Vlsi Design ◽

Full Adder ◽

Comparative Performance

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