scholarly journals DESIGN AND IMPLEMENTATION OF TURBO CODER FOR LTE ON FPGA

2014 ◽  
pp. 48-52
Author(s):  
SANTOSH GOORU ◽  
DR. S. RAJARAM
Keyword(s):  
Turbo Codes ◽  
Turbo Code ◽  
The Novel ◽  
Excellent Performance ◽  
Turbo Decoder ◽  
Map Algorithm ◽  
3Gpp Lte ◽  
Channel Codes ◽  
Field Programmable ◽  
Turbo Encoder

Recent wireless communication standards such as 3GPP-LTE, WiMax, DVB-SH and HSPA incorporates turbo code for its excellent performance. This work provides an overview of the novel class of channel codes referred to as turbo codes, which have been shown to be capable of performing close to the Shannon Limit. It starts with a brief discussion on turbo encoding, and then move on to describing the form of the iterative decoder most commonly used to decode turbo codes. Here, Turbo decoder uses original MAP algorithm instead of using the approximated Max log-MAP algorithm thereby it reduces the number iterations to decode the transmitted information bits. This paper presents the FPGA (Field Programmable Gate Array) implementation simulation results for Turbo encoder and decoder structure for 3GPP-LTE standard.

Research and Realization by FPGA of Turbo Codes

2012 ◽  
Vol 588-589 ◽  
pp. 765-768
Author(s):  
Jin Xu ◽  
Ying Zhao ◽  
Shu Qiang Duan
Keyword(s):  
Turbo Codes ◽  
Channel Coding ◽  
Turbo Code ◽  
Noise Signal ◽  
Low Noise ◽  
Random Coding ◽  
Map Algorithm ◽  
Key Issues ◽  
Turbo Encoder ◽  
Log Map

Turbo Code is a channel coding with excellent error-correcting performance in the condition of low noise-signal ratio.It has a superior decoding performance approaching the Shannon limit by adopting the random coding and decoding. This paper focuses on Turbo code and its implementation with FPGA and deeply analyzes the decoding theory and algorithm of Turbo code. Firstly, it analyzes the decoding theory of Turbo code. Then, it discusses key issues in the process of implementation with the most excellent and complicated Max—log—MAP algorithm. At last, it ends up with the Turbo encoder and decoding algorithm which hardware is successfully implemented finally.

scholarly journals Efficient MAP-algorithm implementation on programmable architectures

2003 ◽  
Vol 1 ◽  
pp. 259-263 ◽  
Author(s):  
F. Kienle ◽  
H. Michel ◽  
F. Gilbert ◽  
N. Wehn
Keyword(s):  
Turbo Codes ◽  
Communication Systems ◽  
Building Blocks ◽  
Communication Performance ◽  
Channel Decoding ◽  
Turbo Decoder ◽  
Decoding Algorithms ◽  
Map Algorithm ◽  
Algorithm Implementation ◽  
Log Map

Abstract. Maximum-A-Posteriori (MAP) decoding algorithms are important HW/SW building blocks in advanced communication systems due to their ability to provide soft-output informations which can be efficiently exploited in iterative channel decoding schemes like Turbo-Codes. Multi-standards demand flexible implementations on programmable platforms. In this paper we analyze a quantized turbo-decoder based on a Max-Log-MAP algorithm with Extrinsic Scaling Factor (ESF). Its communication performance approximate to a Turbo-Decoder with a Log-MAP algorithm and is less sensitive to quantization effects. We present Turbo-Decoder implementations on state-of-the-art DSPs and show that only a Max-Log-MAP implementation fulfills a throughput requirement of ~2 Mbit/s. The negligible overhead for the ESF implementation strengthen the use of Max-Log-MAP with ESF implementation on programmable platforms.

scholarly journals Error Detection in Turbo Decoding using Neural Network

2019 ◽  
Vol 9 (1S) ◽  
pp. 218-221
Keyword(s):  
Neural Network ◽  
Bit Error Rate ◽  
Error Rate ◽  
Error Detection ◽  
Turbo Codes ◽  
Iterative Decoding ◽  
Turbo Decoding ◽  
Turbo Decoder ◽  
The Neural Network ◽  
Turbo Encoder

In this paper reduction of errors in turbo decoding is done using neural network. Turbo codes was one of the first thriving attempt for obtaining error correcting performance in the vicinity of the theoretical Shannon bound of –1.6 db. Parallel concatenated encoding and iterative decoding are the two techniques available for constructing turbo codes. Decrease in Eb/No necessary to get a desired bit-error rate (BER) is achieved for every iteration in turbo decoding. But the improvement in Eb/No decreases for each iteration. From the turbo encoder, the output is taken and this is added with noise, when transmitting through the channel. The noisy data is fed as an input to the neural network. The neural network is trained for getting the desired target. The desired target is the encoded data. The turbo decoder decodes the output of neural network. The neural network help to reduce the number of errors. Bit error rate of turbo decoder trained using neural network is less than the bit error rate of turbo decoder without training.

scholarly journals Turbo Codes Construction for Robust Hybrid Multitransmission Schemes

2011 ◽  
Vol 7 (4) ◽  
pp. 128 ◽  
Author(s):  
Fulvio Babich ◽  
Francesca Vatta
Keyword(s):  
Turbo Codes ◽  
Channel Coding ◽  
Design Method ◽  
Turbo Code ◽  
Average Distance ◽  
Coding System ◽  
Period Increase ◽  
Wired Networks ◽  
Turbo Encoder ◽  
Arq Schemes

In certain applications the user has to cope with some random packet erasures due, e.g., to deep fading conditions on wireless links, or to congestion on wired networks. In other applications, the user has to cope with a pure wireless link, in which all packets are available to him, even if seriously corrupted. The ARQ/FEC schemes already studied and presented in the literature are well optimized only for one of these two applications. In a previous work, the authors aimed at bridging this gap, giving a design method for obtaining hybrid ARQ schemes that perform well in both conditions, i.e., at the presence of packet erasures and packet fading. This scheme uses a channel coding system based on partially-systematic periodically punctured turbo codes. Since the computation of the transfer function and, consequently, the union bound on the Bit or Frame Error Rate of a partiallysystematic punctured turbo code becomes highly intensive as the interleaver size and the puncturing period increase, in this work a simplified and more efficient method to calculate the most significant terms of the average distance spectrum of the turbo encoder is proposed and validated.

scholarly journals Parameter Estimation of Turbo Code Encoder

2014 ◽  
Vol 2014 ◽  
pp. 1-6 ◽  
Author(s):  
Mehdi Teimouri ◽  
Ahmadreza Hedayat
Keyword(s):  
Turbo Codes ◽  
Turbo Code ◽  
Search Space ◽  
Design Parameters ◽  
Channel Code ◽  
Reconstruction Process ◽  
Input And Output ◽  
Novel Method ◽  
Channel Errors ◽  
Turbo Encoder

The problem of reconstruction of a channel code consists of finding out its design parameters solely based on its output. This paper investigates the problem of reconstruction of parallel turbo codes. Reconstruction of a turbo code has been addressed in the literature assuming that some of the parameters of the turbo encoder, such as the number of input and output bits of the constituent encoders and puncturing pattern, are known. However in practical noncooperative situations, these parameters are unknown and should be estimated before applying reconstruction process. Considering such practical situations, this paper proposes a novel method to estimate the above-mentioned code parameters. The proposed algorithm increases the efficiency of the reconstruction process significantly by judiciously reducing the size of search space based on an analysis of the observed channel code output. Moreover, simulation results show that the proposed algorithm is highly robust against channel errors when it is fed with noisy observations.

scholarly journals A Parallel Turbo Decoder Based on Recurrent Neural Network

2021 ◽  
Author(s):  
Li Zhang ◽  
weihong fu ◽  
Fan Shi ◽  
Chunhua Zhou ◽  
Yongyuan Liu
Keyword(s):  
Neural Network ◽  
Turbo Codes ◽  
Communication Systems ◽  
Turbo Code ◽  
Error Rates ◽  
Learning Ability ◽  
Turbo Decoder ◽  
Lstm Network ◽  
T Distribution ◽  
Decoding Delay

Abstract A neural network-based decoder, based on a long short-term memory (LSTM) network, is proposed to solve the problem of high decoding delay caused by the poor parallelism of existing decoding algorithms for turbo codes. The powerful parallel computing and feature learning ability of neural networks can reduce the decoding delay of turbo codes and bit error rates simultaneously. The proposed decoder refers to a unique component coding concept of turbo codes. First, each component decoder is designed based on an LSTM network. Next, each layer of the component decoder is trained, and the trained weights are loaded into the turbo code decoding neural network as initialization parameters. Then, the turbo code decoding network is trained end-to-end. Finally, a complete turbo decoder is realized. Simulation results show that the performance of the proposed decoder is improved by 0.5–1.5 dB compared with the traditional serial decoding algorithm in Gaussian white noise and t-distribution noise. Furthermore, the results demonstrate that the proposed decoder can be used in communication systems with various turbo codes and that it solves the problem of high delay in serial iterative decoding.

scholarly journals A Novel 4H-SiC MESFET with a Heavily Doped Region, a Lightly Doped Region and an Insulated Region

Micromachines ◽  
2021 ◽  
Vol 12 (5) ◽  
pp. 488
Author(s):  
Hujun Jia ◽  
Mengyu Dong ◽  
Xiaowei Wang ◽  
Shunwei Zhu ◽  
Yintang Yang
Keyword(s):  
Breakdown Voltage ◽  
Direct Current ◽  
Oscillation Frequency ◽  
The Novel ◽  
Saturation Current ◽  
Excellent Performance ◽  
Maximum Oscillation Frequency ◽  
Power Added Efficiency ◽  
Novel Structure ◽  
Heavily Doped

A novel 4H-SiC MESFET was presented, and its direct current (DC), alternating current (AC) characteristics and power added efficiency (PAE) were studied. The novel structure improves the saturation current (Idsat) and transconductance (gm) by adding a heavily doped region, reduces the gate-source capacitance (Cgs) by adding a lightly doped region and improves the breakdown voltage (Vb) by embedding an insulated region (Si3N4). Compared to the double-recessed (DR) structure, the saturation current, the transconductance, the breakdown voltage, the maximum oscillation frequency (fmax), the maximum power added efficiency and the maximum theoretical output power density (Pmax) of the novel structure is increased by 24%, 21%, 9%, 11%, 14% and 34%, respectively. Therefore, the novel structure has excellent performance and has a broader application prospect than the double recessed structure.

Application of Extrinsic Information Transfer Charts to Anticipate Turbo Code Behavior

2013 ◽  
pp. 97-104
Author(s):  
Izabella Lokshina
Keyword(s):  
Turbo Codes ◽  
Iterative Decoding ◽  
Information Transfer ◽  
Turbo Code ◽  
A Priori ◽  
Substantial Reduction ◽  
International Standards ◽  
Extrinsic Information ◽  
Exit Chart ◽  
Analysis Technique

This paper examines turbo codes that are currently introduced in many international standards, including the UMTS standard for third generation personal communications and the ETSI DVB-T standard for Terrestrial Digital Video Broadcasting. The convergence properties of the iterative decoding process associated with a given turbo-coding scheme are estimated using the analysis technique based on so-called extrinsic information transfer (EXIT) chart. This approach provides a possibility to anticipate the bit error rate (BER) of a turbo code system using only the EXIT chart. It is shown that EXIT charts are powerful tools to analyze and optimize the convergence behavior of iterative systems utilizing the turbo principle. The idea is to consider the associated SISO stages as information processors that map input a priori LLR’s onto output extrinsic LLR’s, the information content being obviously assumed to increase from input to output, and introduce them to the design of turbo systems without the reliance on extensive simulation. Compared with the other methods for generating EXIT functions, the suggested approach provides insight into the iterative behavior of linear turbo systems with substantial reduction in numerical complexity.

Evalutation of Turbo Decoder Performance Through Software Reference Model

2022 ◽  
pp. 179-197
Author(s):  
Manjunatha K. N. ◽  
Raghu N. ◽  
Kiran B.
Keyword(s):  
Reference Model ◽  
Channel Noise ◽  
Clock Gating ◽  
Matlab Simulink ◽  
Turbo Decoder ◽  
Data Encoding ◽  
Frame Length ◽  
Noise Type ◽  
Turbo Encoder ◽  
Number Of Iterations

Turbo encoder and decoder are two important blocks of long-term evolution (LTE) systems, as they address the data encoding and decoding in a communication system. In recent years, the wireless communication has advanced to suit the user needs. The power optimization can be achieved by proposing early termination of decoding iteration where the number of iterations is made adjustable which stops the decoding as it finishes the process. Clock gating technique is used at the RTL level to avoid the unnecessary clock given to sequential circuits; here clock supplies are a major source of power dissipation. The performance of a system is affected due to the numbers of parameters, including channel noise, type of decoding and encoding techniques, type of interleaver, number of iterations, and frame length on the Matlab Simulink platform. A software reference model for turbo encoder and decoder are modeled using MATLAB Simulink. Performance of the proposed model is estimated and analyzed on various parameters like frame length, number of iterations, and channel noise.

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