Automotive Electric System Level Design Methodologies with SystemC

Mapping Intimacies ◽

10.4271/2012-01-0003 ◽

2012 ◽

Cited By ~ 1

Author(s):

Hideaki Ishihara ◽

Naoki Sugiyama ◽

Masato Rinnai ◽

Hirofumi Yamamoto ◽

Shinichirou Taguchi ◽

...

Keyword(s):

System Level ◽

System Level Design ◽

Electric System ◽

Design Methodologies ◽

Level Design

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Teaching trade-offs in system-level design methodologies

Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03 ◽

10.1109/mse.2003.1205256 ◽

2004 ◽

Cited By ~ 2

Author(s):

K. Sakiyama ◽

P. Schaumont ◽

D. Hwang ◽

I. Verbauwhede

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Trade Offs ◽

Level Design

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System-Level Design Methodologies for Telecommunication

10.1007/978-3-319-00663-5 ◽

2014 ◽

Cited By ~ 6

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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System level design methodologies from the viewpoint of formal verification

2003 5th International Conference on ASIC Proceedings (IEEE Cat No 03TH8690) ICASIC-03 ◽

10.1109/icasic.2003.1277479 ◽

2003 ◽

Author(s):

Fujita

Keyword(s):

Formal Verification ◽

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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TB1 Session: System level design methodologies

23rd IEEE International SOC Conference ◽

10.1109/socc.2010.5784714 ◽

2010 ◽

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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TB2 session: System level design methodologies

23rd IEEE International SOC Conference ◽

10.1109/socc.2010.5784716 ◽

2010 ◽

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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Session WP1C: System level design methodologies

2015 28th IEEE International System-on-Chip Conference (SOCC) ◽

10.1109/socc.2015.7406909 ◽

2015 ◽

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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System level design methodologies in the multi-processor SoC era

10.1109/icces.2007.4447015 ◽

2007 ◽

Author(s):

Masaharu Imai

Keyword(s):

System Level ◽

System Level Design ◽

Design Methodologies ◽

Level Design

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MPSoC System Level Design Method Based on Universal Interconnect Network

Journal of Computer-Aided Design & Computer Graphics ◽

10.3724/sp.j.1089.2010.10721 ◽

2010 ◽

Vol 22 (5) ◽

pp. 858-864

Author(s):

Yuanshen Li ◽

Yun Pan ◽

Yong Ding ◽

Xiaolang Yan

Keyword(s):

Design Method ◽

System Level ◽

System Level Design ◽

Level Design ◽

Interconnect Network

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A system-level design method for RF receiver front-end with low power consumption

Analog Integrated Circuits and Signal Processing ◽

10.1007/s10470-021-01879-y ◽

2021 ◽

Author(s):

Ziba Fazel ◽

Mojtaba Atarodi ◽

Sirus Sadughi

Keyword(s):

Power Consumption ◽

Low Power ◽

Design Method ◽

System Level ◽

Low Power Consumption ◽

System Level Design ◽

Rf Receiver ◽

Front End ◽

Level Design

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Low-complexity SPICE Analog Behavioral Modeling of the ideal battery for system level design

2020 IEEE ANDESCON ◽

10.1109/andescon50619.2020.9272055 ◽

2020 ◽

Author(s):

Ariel Jimenez ◽

Natalia Morales ◽

Carlos Paez ◽

Arturo Fajardo ◽

Gabriel Perilla

Keyword(s):

Low Complexity ◽

Behavioral Modeling ◽

System Level ◽

System Level Design ◽

Level Design ◽

The Ideal

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