Versioning Support for Design Reuse

2009 ◽  
Author(s):  
W. Ivins ◽  
J.C. Miles ◽  
W.A. Gray
Keyword(s):  
Design Reuse

A constraint redundancy elimination strategy to improve design reuse in parametric modeling

2021 ◽  
Vol 129 ◽  
pp. 103460
Author(s):  
Carmen González-Lluch ◽  
Raquel Plumed ◽  
David Pérez-López ◽  
Pedro Company ◽  
Manuel Contero ◽  
...  
Keyword(s):  
Parametric Modeling ◽  
Design Reuse ◽  
Redundancy Elimination ◽  
Constraint Redundancy ◽  
Improve Design

Optimal software design reuse policies: A control theoretic approach

2013 ◽  
Vol 17 (2) ◽  
pp. 439-453 ◽  
Author(s):  
Monica Johar ◽  
Vijay Mookerjee ◽  
Suresh Sethi
Keyword(s):  
Software Design ◽  
Design Reuse ◽  
Theoretic Approach

Automatic Scaling Procedures for Analog Design Reuse

2006 ◽  
Vol 53 (12) ◽  
pp. 2539-2547 ◽  
Author(s):  
Alessandro Savio ◽  
Luigi Colalongo ◽  
Michele Quarantelli ◽  
Zsolt M. Kovacs-Vajna
Keyword(s):  
Design Reuse ◽  
Analog Design ◽  
Automatic Scaling

Study on a Knowledge-Reuse-Based Rapid Product Design Process

2008 ◽  
Vol 392-394 ◽  
pp. 543-550 ◽  
Author(s):  
Hun Guo ◽  
Guo Xing Tang ◽  
Dun Wen Zuo ◽  
T.J. Liu ◽  
W.D. Jin
Keyword(s):  
Product Design ◽  
Design Process ◽  
Iterative Process ◽  
Process Model ◽  
Design Reuse ◽  
Knowledge Reuse ◽  
Construction Machinery ◽  
Current Design ◽  
Product Design Process ◽  
Three Factor

Design reuse is the application of past designs knowledge and successful experience to current design process and it is a significant method for rapid design. A knowledge-reuse-based rapid product design model is proposed and a three-factor product design iterative process model is studied. Finally, it is applied successfully in the rapid product design of construction machinery combining with the requirement of the construct machinery product design.

Design Reuse in Manufacturing and Services*

2008 ◽  
Vol 25 (5) ◽  
pp. 457-472 ◽  
Author(s):  
John E. Ettlie ◽  
Matthew Kubarek
Keyword(s):  
Design Reuse

scholarly journals Design and Architecture of Jxta-Based Game Software in Java

2020 ◽  
Author(s):  
Frank Appiah
Keyword(s):  
Software Development ◽  
Undirected Graph ◽  
Design Reuse ◽  
The World ◽  
Software Processes

This paper discusses the interest of explicit software processes of design and architecture for (1) architectural view understanding and communication, (2) design reuse and principles of Jxta-based game software development. The considered architecture includes hierarchical and logical views which are modeled in the Java-based Maiar API and achieved by Jxta message exchanges. The topology of the world map of the game software can be viewed as undirected graph in which vertices (nodes) represent the rooms and the edges represent the rooms and the edges represent the playable movements between nodes.<div><br></div><div><br></div>

scholarly journals An overview of on-chip buses

2006 ◽  
Vol 19 (3) ◽  
pp. 405-428 ◽  
Author(s):  
Milica Mitic ◽  
Mile Stojcev
Keyword(s):  
Interconnection Networks ◽  
Electronics Industry ◽  
Design Reuse ◽  
Design Teams ◽  
Single Chip ◽  
Data Transfers ◽  
System On A Chip ◽  
Design Interfaces ◽  
On Chip ◽  
Levels Of Integration

The electronics industry has entered the era of multi-million-gate chips, and there Xs no turning back. This technology promises new levels of integration on a single chip, called the System-on-a-Chip (SoC) design, but also presents significant challenges to the chip designer. Processing cores on a single chip, may number well into the high tens within the next decade, given the current rate of advancements, [1]. Interconnection networks in such an environment are, therefore, becoming more and more important [2]. Currently on-chip interconnection networks are mostly implemented using buses. For SoC applications, design reuse becomes easier if standard internal connection buses are used for interconnecting components of the design. Design teams developing modules intended for future reuse can design interfaces for the standard bus around their particular modules. This allows future designers to slot the reuse module into their new design simply, which is also based around the same standard bus [3]. In this paper we give an overview of the more popular on-chip bus-based interconnection networks such as AMBA, Avalon CoreConnect, STBus, Wishbone, etc. The main characteristics of the considered buses in respect to topology, arbitration method, bus-width, and types of data transfers are discussed.

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