Design of a Miniaturized Vibrating Beam Power Converter

2014 ◽  
Vol 2014 (1) ◽  
pp. 000522-000532
Author(s):  
Thomas F. Marinis ◽  
Joseph W. Soucy
Keyword(s):  
Supply Voltage ◽  
Power Converter ◽  
Beam Power ◽  
Operating Voltage ◽  
Multichip Modules ◽  
Sinusoidal Voltage ◽  
Beam Vibration ◽  
Fixed Electrode ◽  
Output Filter ◽  
Source Electrode

One of the largest components on miniaturized, multichip modules is the chip inductor associated with the onboard DC to DC power converter. It is an essential component for efficient conversion of the system voltage to the operating voltage of the module. In a previous paper, we described how vibrating capacitor structures could be used to perform inductor functions. In this paper, we focus on the specific application of an on-board power converter. Our vision is for a MEMS scale device that could be attached to the back of a chip as an appliqué or embedded in an interposer on which the chip was mounted. It would function as a DC to DC converter to extract power from the system buss and supply it to the chip at its required operating voltage. This device consists of a long, flat, rectangular, vibrating beam that is sandwiched between two fixed electrodes. It is clamped at its two ends and electrically connected to ground. On one of the fixed electrodes, which we refer to as the source electrode, a bias potential is applied through a resistor connected to a battery. The motion of the beam relative to the source electrode generates a sinusoidal like fluctuation in the potential between them. The amplitude of this alternating voltage is set by the amplitude of the beam vibration and the nominal gap between the beam and source electrode. It can be made insensitive to variations in battery voltage, by controlling the amplitude of the beam vibrations. The sinusoidal portion of the bias voltage can be extracted through a DC blocking capacitor connected to the source electrode. By passing it through a rectifier and filter capacitor, it can be used as a stable DC supply voltage. The beam vibration is initiated and sustained by voltage pulses applied to the other fixed electrode, which we refer to as the drive electrode. A logic circuit connected to the source electrode monitors its sinusoidal voltage and applies a pulse to the drive electrode when two criteria are met. First, the sinusoidal voltage must be rising, which occurs when the beam is moving away from the source electrode and towards the drive electrode. Second, the time average of the sinusoidal voltage must be below its desired set point, which means that more energy must be injected into the beam. When voltage is applied to the drive electrode, it exerts a force on the vibrating beam that pulls it towards the drive electrode. We have constructed a Mat Lab model of a vibrating beam power converter and have been using it to examine a number of design factors including, physical size, vibration frequency and amplitude, values for the DC blocking and output filter capacitors, as well as the logic used to apply pulses to the drive electrode. Our intent is to develop a sufficient understanding of the device operational and physical design requirements to enable us to build a prototype device.

Smart Battery Charging Station for ElectricVehicle Using Half Bridge Power Converter

2018 ◽  
Vol 19 (4) ◽  
Author(s):  
B. R. Ananthapadmanabha ◽  
Rakesh Maurya ◽  
Sabha Raj Arya ◽  
B. Chitti Babu
Keyword(s):  
Power Quality ◽  
Distribution System ◽  
Reactive Power ◽  
Supply Voltage ◽  
Power Converter ◽  
Constant Current ◽  
Battery Charging ◽  
Charging Station ◽  
Simulink Model ◽  
Smart Charging

Abstract This paper presents a concept of smart charging station using bidirectional half bridge converter for an electric vehicle. This battery charging station is useful for charging applications along with harmonics and reactive power compensation in a distribution system. A filter which is adaptive to the supply voltage frequency is used for the estimation of the 50 Hz component of load current. Due to additional features of vehicle charger, associated with the power quality improvement, there will be a drastic reduction in the current drawn from utility to meet the same load demand. The charging station presented in this paper is termed as smart with several function. The proposed smart charger is able to improve power quality of residential loads or other loads, not only during charging/discharging of the vehicle battery, but also in the absence of the vehicle. The Simulink model is developed with MATLAB software and its simulation results are presented. The level of current distortion during charging and and discharging mode is recorded 1.6 % and 2.4 % respectively with unity supply power factor during experiments. The performance of converter is evaluated during charging modes both in constant current (CC) and constant voltage (CV) modes.

A Novel Feasibility Test for Energy Minimization of Real-Time Mixed Task Sets for DVS-Enabled Uniprocessor System

2021 ◽  
pp. 2250052
Author(s):  
H. T. Manohara ◽  
B. P. Harish
Keyword(s):  
Real Time ◽  
Energy Minimization ◽  
Supply Voltage ◽  
Simultaneous Optimization ◽  
Dynamic Scaling ◽  
Operating Voltage ◽  
Periodic Tasks ◽  
Optimal Operating ◽  
Dynamic Activity ◽  
Task Sets

With advancements in computing and communication technologies on mobile devices, the performance requirements of embedded processors have significantly increased, resulting in a corresponding increase in its energy consumption. Dynamic scaling of operating voltage and operating frequency has a strong correlation to energy minimization in CMOS real-time circuits. Simultaneous optimization of ([Formula: see text], [Formula: see text] pairs under dynamic activity levels is thus extensively investigated over several years. The supply voltage is tuned dynamically during runtime (DVS), with a fixed threshold voltage, to achieve energy minimization. This work addresses the issue of maximizing the energy efficiency of real-time periodic, aperiodic and mixed task sets, in a uniprocessor system, by developing a novel task feasibility methodology, with a novel processor performance-based constraint, to generate the optimal operating supply voltage to the individual task of task sets. The energy minimization of real-time mixed task sets is formulated as Geometric Programming (GP) problem, by varying frequency for periodic tasks sets and keeping fixed frequency for aperiodic tasks set, over a range of task sets and hence computing optimal operating voltages. Simulation experiments show energy savings on the cumulative basis of 50%, 38% and 29% for periodic, aperiodic and mixed task sets, respectively, based on the processing timing constraints of task sets.

PID Controller Response to Set-Point Change in DC-DC Converter Control

2016 ◽  
Vol 7 (2) ◽  
pp. 294 ◽  
Author(s):  
Oladimeji Ibrahim ◽  
Nor Zaihar B Yahaya ◽  
Nordin Saad
Keyword(s):  
Disturbance Rejection ◽  
Pid Controller ◽  
Supply Voltage ◽  
Control Unit ◽  
Voltage Regulation ◽  
Power Converter ◽  
Point Change ◽  
Set Point ◽  
Circuit Elements ◽  
Tuning Methods

Power converter operations and efficiency is affected by variation in supply voltage, loads current, circuit elements, ageing and temperature.  To meet the objective of tight voltage regulation, power converters circuit module and the control unit must be robust to reject disturbances arising from supply, load variation and changes in circuit elements. PID controller has been the most widely used in power converter control. This paper presents studies of robustness of PID controller tuning methods to step changes in the set point and disturbance rejection in power converter control. A DC-DC boost converter was modelled using averaged state-space mothod and PID controllers were designed with five different tuning methods. The study reveals the transient response and disturbance rejection capability of each tuning methods for their suitability in power supply design applications.

A 16.4 nW, Sub-1 V, Resistor-Less Voltage Reference with BJT Voltage Divider

2018 ◽  
Vol 27 (13) ◽  
pp. 1850206 ◽  
Author(s):  
Qingshan Yang ◽  
Peiqing Han ◽  
Niansong Mei ◽  
Zhaofeng Zhang
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Voltage Divider ◽  
Total Power ◽  
Cmos Process ◽  
Operating Voltage ◽  
Voltage Reference ◽  
Ultra Low Power ◽  
Silicon Area ◽  
Total Power Consumption

A 16.4[Formula: see text]nW, sub-1[Formula: see text]V voltage reference for ultra-low power low voltage applications is proposed. This design reduces the operating voltage to 0.8[Formula: see text]V by a BJT voltage divider and decreases the silicon area considerably by eliminating resistors. The PTAT and CTAT are based on SCM structures and a scaled-down [Formula: see text], respectively, to improve the process insensitivity. This work is fabricated in 0.18[Formula: see text][Formula: see text]m CMOS process with a total area of 0.0033[Formula: see text]mm2. Measured results show that it works properly for supply voltage from 0.8[Formula: see text]V to 2[Formula: see text]V. The reference voltage is 467.2[Formula: see text]mV with standard deviation ([Formula: see text]) being 12.2 mV and measured TC at best is 38.7[Formula: see text]ppm/[Formula: see text]C ranging from [Formula: see text]C to 60[Formula: see text]C. The total power consumption is 16.4[Formula: see text]nW under the minimum supply voltage at 27[Formula: see text]C.

Electric Power Converter with a Wide Input Voltage Range

2016 ◽  
Vol 7 (4) ◽  
pp. 1221
Author(s):  
K.O. Khokhlov ◽  
G.K. Khokhlov ◽  
A.V. Ishchenko ◽  
A.N. Cherepanov ◽  
A.S. Naronov
Keyword(s):  
Electric Power ◽  
Supply Voltage ◽  
Power Conversion ◽  
Experimental Studies ◽  
Input Voltage ◽  
Power Converter ◽  
Oil Well ◽  
Electronic Circuits ◽  
Voltage Range

The electric power converter for downhole telemetry systems of oil-well pumps include a downhole block connected to the pump that contains electronic circuits required for the operation of the motor pump sensors and transmission of data about their condition to the surface are described. A few methods of electric power conversion for this purpose are considered. The circuit contained two steps of voltage converting are proposed. The electrical scheme of this method is considered in the article. Proposed decisions are simulated and verified experimentally. The input high supply voltage range (200-4200 V) without loss of efficiency (even temporary) was obtained. The results of simulation and experimental studies have shown very close results.

Implementation and Design of Voltage-Mode PFM Control Buck Power Converter

2013 ◽  
Vol 860-863 ◽  
pp. 2390-2394
Author(s):  
Min Chin Lee ◽  
Ruey Wun Jan
Keyword(s):  
Supply Voltage ◽  
Pulse Frequency ◽  
Power Converter ◽  
Buck Converter ◽  
Switching Frequency ◽  
Cmos Process ◽  
Pulse Frequency Modulation ◽  
Better Regulation ◽  
Chip Size ◽  
Voltage Feedback

A lower power consumption, smaller output ripple and better regulation buck dcdc converter controlled by voltage feedback and pulse-frequency modulation (PFM) mode is implemented in this paper. The converter operating in discontinuous conduction mode (DCM) is designed and simulated using the TSMC 0.18μm 1P6M CMOS Process. Hspice simulation results show that, the buck converter having chip size with power dissipation about 0.68mW. This chip can operate with input supply voltage from 1.2V to 1.8V, and switching frequency from 249KHz () to 50KHz (), and its output voltage can stable at 1.0V and less than 110mV ripple voltage at maximum loading current 100 mA.

Monte-Carlo Analysis of a New 6-T Full-Adder Cell for Power and Propagation Delay Optimizations in 180nm Process

2013 ◽  
Vol 284-287 ◽  
pp. 2580-2589
Author(s):  
G. Ramana Murthy ◽  
C. Senthilpari ◽  
P. Velrajkumar ◽  
T.S. Lim
Keyword(s):  
Energy Consumption ◽  
High Speed ◽  
Supply Voltage ◽  
Full Adder ◽  
Monte Carlo Analysis ◽  
Performance Comparison ◽  
Process Models ◽  
Operating Voltage ◽  
Control Input ◽  
Efficient Operation

This paper presents a 1-bit full adder by using as few as six transistors per bit in its design. It is designed with a combination of multiplexing control input and Boolean identities. The proposed design features lower operating voltage, higher computing speed and lower energy consumption due to the efficient operation of 6-transistor adder cell. The design adopts Multiplexing with Control input technique to alleviate the threshold voltage loss problem commonly encountered in pass transistor logic design. The proposed design successfully embeds the buffering circuit in the full adder design and the transistor count is minimized. The improved buffering helps the design operate under lower supply voltage compared with existing works. It also enhances the speed performance of the cascaded operation significantly while maintaining the performance edge in energy consumption. For performance comparison, the proposed full adder is evaluated along with four existing full adders via extensive BSIM4 simulation. The simulation results, 180nm process models, indicate that the proposed design has lowest energy consumption per addition along with the performance edge in both speed and energy consumption makes it suitable for low power and high speed embedded processor applications.

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