Print Copper on Ceramic for High Reliability Electronics

2015 ◽  
Vol 2015 (1) ◽  
pp. 000330-000335
Author(s):  
Ryan Persons ◽  
Paul Gundel

In the power electronics world, Direct Bonded Copper (DBC) is the primary substrate technology. In this paper, we will discuss an alternative technology utilizing screen printable copper pastes (Thick Printed Copper - TPC) on a variety of substrate technologies including Alumina (Al2O3) and Aluminum Nitride (AlN). These materials when processed, look and perform similar to DBC, but exhibit superior reliability and excellent design flexibility. DBC has drawbacks when it comes to thermal mechanical reliability and lacks the flexibility to have multiple copper thicknesses for power and signal circuits within the same design, which is easily achieved via screen printing. The benefits of this TPC system will be demonstrated through data generated on passive thermal shock tests in comparison to high end DBC. Furthermore, this Thick Print Copper technology has the excellent potential for replacing high end Metal Core Printed Circuit Board (MCPCB) technology due to utilization of higher thermal conductive dielectric materials like Al2O3 and AlN. This will allow for designers to drive their LED's harder and effectively producing LED modules with higher power densities.

1987 ◽  
Vol 108 ◽  
Author(s):  
David Wei Wang

The printed circuit board is an integral part of the electronic packaging hierarchy. Its use began more than 40 years ago, and the demand for printed circuit boards has increased in parallel with the growth of the electronics industry.[1] According to a recent forecast, the worldwide production of printed circuit boards will reach to over 19 billion U.S. dollars' worth by 1990.[2] With continuing demands for more interconnections, the multilayer circuit board industry is experiencing its fastest growth rate. Boards with more than 20 inner planes of circuitry are being manufactured with high reliability.Based on dollar values, more than 90% of the circuit boards produced are in the rigid board category, where starting materials are based on thermosetting prepregs produced by a solution impregnation method. This article is a review of materials currently used in rigid composites.


1994 ◽  
Vol 9 (2) ◽  
pp. 104-111
Author(s):  
Hideaki SASAJIMA ◽  
Shinichi MIKAMI ◽  
Takayuki OHSHIMA ◽  
Yoshiyuki YAMAMORI ◽  
Toshio NAKAO

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Chong Hooi Lim ◽  
M.Z. Abdullah ◽  
I. Abdul Azid ◽  
C.Y. Khor ◽  
M.S. Abdul Aziz ◽  
...  

Purpose The purpose of this study is to investigate heat transfer and deformation of flexible printed circuit board (FPCB) under thermal and flow effects by using fluid structure interaction. This study simulate the electronic cooling process when electronic devices are generating heat during operation at FPCB under force convection. Design/methodology/approach The thermal and flow effects on FPCB with attached ball grid array (BGA) packages have been investigated in the simulation. Effects of Reynolds number (Re), number of BGA packages attached, power supplied to the BGA packages and size of FPCB were studied. The responses in the present study are the deflection/length of FPCB (δ/L) and Nusselt number (Nu). Findings It is important to consider both thermal and flow effects at the same time for understanding the characteristic of FPCB attached with BGA under operating condition. Empirical correlation equations of Re, Prandtl number (Pr), δ/L and Nu have been established, in which the highest effect is of Re, followed by Pr and δ/L. The δ/L and Nu¯ were found to be significantly affected by most of the parametric factors. Practical implications This study provides a better understanding of the process control in FPCB assembly. Originality/value This study provides fundamental guidelines and references for the thermal coupling modelling to address reliability issues in FPCB design. It also increases the understanding of FPCB and BGA joint issues to achieve high reliability in microelectronic design.


Author(s):  
John Chia ◽  
Charles Yang

A near CSP plastic encapsulated package with a quad flat non-leaded (QFN) structure has been drawn much attention due to it small size and lightweight applications. Thermal efficiency is the major concern for adopting such type of package in place of TSSOP package. The thermal dissipation for electronics with the higher power consumption is current developing to it uppermost limitation as a wire bonded, lead-frame substrate type of QFN with various pine counts and body sizes. It is therefore an object of the present study to investigate thermal performance of QFN package optimum design attached on different layers and thickness of laminated printed circuit board (PCB), which is further related to reliability issue of this type of IC package. Numerical simulation illustrates how the thermal efficiency of the QFN package can be reached with different PCB designs and airflow conditions.


Symmetry ◽  
2021 ◽  
Vol 13 (10) ◽  
pp. 1771
Author(s):  
Aleksandr Vasjanov ◽  
Vaidotas Barzdenas

To process high-frequency signals on a printed circuit board (PCB), it is often necessary to carefully analyze and select the pad widths of the chip packages and components to match their impedance to the standard Z0. Modern PCBs are complex multilayer designs, utilizing either only high-end laminates, low-end laminates, or a combination of both. The on-board component footprints usually have larger pads that become discontinuities and corrupt the impedance of critical traces. One way to address this issue is to include reference plane cutouts as a measure of compensation. This paper aims to find out how an asymmetric dielectric stack-up affects the microstrip discontinuity impedance compensation using reference plane cutouts. The selected board layer stack-up imitates several different practical design scenarios, including costly PCBs that strictly comprise high-end dielectric materials, as well as trying to lower PCB cost by introducing low-cost materials without major performance sacrifice. S-parameter measurements are performed and confirmed by time domain reflectometry (TDR) measurements.


2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.


Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.


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