Multi-bit memory cell using long-range non-anchored actuation for high temperature applications

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000152-000159
Author(s):  
Mehrdad Elyasi ◽  
Chengkuo Lee ◽  
Cheng-Yu Hsieh ◽  
Dim-Lee Kwong
Keyword(s):  
High Temperature ◽  
Long Range ◽  
Memory Cell ◽  
Sliding Contact ◽  
Adhesion Forces ◽  
Data Retention ◽  
Conductive Path ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
Cell Data

A novel micro-electro-mechanical (MEM) based non-volatile memory (NVM) is proposed. The storage principle is based on Lorentz's transduction, utilizing long-range motion of a non-anchored element which has current carrying sliding contact with a conductive path. Position of the moving element indicates the stored data in the multi-bit cell. Data is written in the cell with displacing the moving element by Lorentz's force, is read by utilizing differential port resistances, and is held by adhesion forces. Data writing at up to 300°C, and data retention and reading for higher temperatures are reliable.

An Analysis of OTP ROM Programmable Devices in 1.0um SOI CMOS

2011 ◽  
Vol 2011 (HITEN) ◽  
pp. 000226-000231
Author(s):  
Paul W. Moody ◽  
Marshall Soares
Keyword(s):  
High Temperature ◽  
Data Retention ◽  
Non Volatile Memory ◽  
Soi Devices ◽  
Volatile Memory ◽  
Programmable Devices ◽  
Soi Cmos ◽  
Temperature Applications

Recent approaches to provide non-volatile memory for high temperature applications have been performance limited, either by data retention in SOI EEPROM devices, or by using processes not well suited to high temperature. This work examines SOI devices that may provide reliable OTP solutions. Anti-fuse and fuse approaches are analyzed to determine programmability, suitability for in-situ programming, density implications, and data retention.

High Temperature EEPROM Using a Differential Approach for High Reliability

2017 ◽  
Vol 2017 (HiTEN) ◽  
pp. 000042-0000045
Author(s):  
Holger Kappert ◽  
Sebastian Braun ◽  
Michael Alfring ◽  
Norbert Kordas ◽  
Andreas Kelberer ◽  
...  
Keyword(s):  
High Temperature ◽  
High Reliability ◽  
Ease Of Use ◽  
Strong Impact ◽  
Calibration Data ◽  
Data Retention ◽  
Silicon Area ◽  
Differential Approach ◽  
Non Volatile Memory ◽  
Volatile Memory

Abstract Various applications require the storage of program code or calibration data inside a non-volatile memory. In many cases data is programmed one time e.g. during initial test or calibration and needs to be stored and readable over the whole lifetime of a product. The expected lifetime is a few thousand hours to ten years or even more depending on the application. Due to its ease of use and reprogramming capability EEPROM based memory is very common in this field in comparison to e.g. fuses which are only one time programmable and consume considerable silicon area. High reliability especially with respect to data retention is the main constraint for these non-volatile memories. Considering the degrading mechanisms which are mainly accelerated by thermal energy, storage and operation temperature have a strong impact on EEPROM reliability. Especially at very high temperatures of 250 °C and above data retention is limited to a few thousand hours or less with further increase of temperature, which makes EEPROM hard to use as a long time non-volatile memory. Nevertheless the increasing complexity of high temperature electronics and its use in high temperature applications like data acquisition systems create a demand for reliable non-volatile memories. In this paper a differential approach is presented, with the focus on increasing the reliability of EEPROM based memories especially with respect to data retention. The circuitry has been realized in a 0.35μm high temperature SOI-CMOS technology.

Quantum Dot Gate (QDG) Quantum Dot Channel (QDC) Multistate Logic Non-Volatile Memory (NVM) with High-K Dielectric HfO2 Barriers

2020 ◽  
Vol 29 (01n04) ◽  
pp. 2040001
Author(s):  
N. R. Butterfield ◽  
R. Mays ◽  
B. Khan ◽  
R. Gudlavalleti ◽  
F. C. Jain
Keyword(s):  
Quantum Dot ◽  
Hafnium Oxide ◽  
Experimental Testing ◽  
Memory Cell ◽  
Floating Gate ◽  
Carrier Injection ◽  
High K ◽  
Non Volatile Memory ◽  
Volatile Memory ◽  
High K Dielectric

This paper presents the theory, fabrication and experimental testing results for a multiple state Non-Volatile Memory (NVM), comprised of hafnium oxide high-k dielectric tunnel and gate barriers as well as a Silicon Quantum Dot Superlattice (QDSL) implemented for the floating gate and inversion channel (QDG) and (QDC) respectively. With the conclusion of Moore’s Law for conventional transistor fabrication, regarding the minimum gate size, current efforts in memory cell research and development are focused on bridging the gap between the conventions of the past sixty years and the future of computing. One method of continuing the increasing chip density is to create multistate devices capable of storing and processing additional logic states beyond 1 and 0. Replacing the silicon nitride floating gate of a conventional Flash NVM with QDSL gives rise to minibands that result in greater control over charge levels stored in the QDG and additional intermediate states. Utilizing Hot Carrier Injection (HCI) programming, for the realized device, various magnitudes of gate voltage pulses demonstrated the ability to accurately control the charge levels stored in the QDG. This corresponds to multiple threshold voltage shifts allowing detection of multiple states during read operations.

scholarly journals Nanoelectromechanical relay without pull-in instability for high-temperature non-volatile memory

2020 ◽  
Vol 11 (1) ◽  
Author(s):  
Sunil Rana ◽  
João Mouro ◽  
Simon J. Bleiker ◽  
Jamie D. Reynolds ◽  
Harold M. H. Chong ◽  
...  
Keyword(s):  
High Temperature ◽  
Non Volatile Memory ◽  
Volatile Memory

A Novel Trapping-Nitride-Storage Non-Volatile Memory Cell Using a Gated-Diode Structure With an Ultra-Thin Dielectric Dopant Diffusion Barrier

2008 ◽  
Vol 55 (8) ◽  
pp. 2202-2211
Author(s):  
Wen-Jer Tsai ◽  
Tien-Fan Ou ◽  
Hsuan-Ling Kao ◽  
Erh-Kun Lai ◽  
Jyun-Siang Huang ◽  
...  
Keyword(s):  
Diffusion Barrier ◽  
Memory Cell ◽  
Diode Structure ◽  
Dopant Diffusion ◽  
Non Volatile Memory ◽  
Volatile Memory
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