Copper, Nickel, and Lead-Free Solder Electroplating Solutions for Pillar and Micro-Pillar Capping Applications

2013 ◽  
Vol 2013 (DPC) ◽  
pp. 001417-001437
Author(s):  
Julia Woertink ◽  
Erik Reddington ◽  
Inho Lee ◽  
Yi Qin ◽  
Jonathan Prange ◽  
...  
Keyword(s):  
Flip Chip ◽  
High Reliability ◽  
Interfacial Properties ◽  
Lead Free ◽  
High Yield ◽  
Lead Free Solder ◽  
Barrier Layers ◽  
3D Packaging ◽  
Free Solder ◽  
Electroplated Copper

Control of height-uniformity, morphology, and interfacial properties is critical to achieving high-yield, high-reliability Copper Pillar and Copper Micro-Pillar capped structures for flip-chip and 3D Packaging applications. The plating chemistries selected for electrolytic copper, barrier layer, and lead-free solder deposition significantly affect these properties. A range of copper plating chemistries is evaluated for plating performance and deposit properties for 20um diameter and 75um diameter pillar plating. Height uniformity, pillar shape, surface morphology, and physical properties are compared. These electroplated copper pillars are then evaluated for compatibility with barrier layers and lead-free solder capping. Post-reflow IMC formation, interfacial properties, and micro-voiding phenomena are studied and the effect of the plating chemistry on the overall compatibility of layers in stacked structures is discussed.

scholarly journals Growth Kinetics of Reaction Layers in Flip Chip Joints with Cu-cored Lead-free Solder Balls

2004 ◽  
Vol 45 (3) ◽  
pp. 754-758 ◽  
Author(s):  
Ikuo Shohji ◽  
Yuji Shiratori ◽  
Hiroshi Yoshida ◽  
Masahiko Mizukami ◽  
Akira Ichida
Keyword(s):  
Growth Kinetics ◽  
Flip Chip ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Balls ◽  
Free Solder ◽  
Kinetics Of Reaction ◽  
Kinetics Of

Practical Application and Analysis of Lead-Free Solder on Chip-On-Flip-Chip SiP for Hearing Aids

2017 ◽  
Vol 2017 (1) ◽  
pp. 000201-000207 ◽  
Author(s):  
Youngtak Lee ◽  
Doug Link
Keyword(s):  
Hearing Aids ◽  
Flip Chip ◽  
Failure Modes ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Practical Application ◽  
Surface Mount ◽  
Free Solder ◽  
On Chip

Abstract Due to rapid growth of the microelectronics industry, packaged devices with small form factors, low costs, high power performance, and increased efficiency have become of high demand in the market. To realize the current market development trend, flip chip interconnection and System-in-Package (SiP) are some of the promising packaging solutions developed. However, a surprising amount of surface mount technology (SMT) defects are associated with the use of lead-free solder paste and methods by which the paste is applied. Two such defects are solder extrusion and tombstoning. Considerable amount of defects associated with solder overflow are found on chip-on-flip-chip (COFC) SiP in hearing aids. Through the use of design of experiments (DOE), lead-free solder defect causes on hearing aids application can be better understood and subsequently reduced or eliminated. This paper will examine the failure modes of solder extrusion and tombstoning that occurred when two different types of lead-free solders, Sn-Ag-Cu (SAC) and BiAgX were used within a SiP for attachment of surface mount devices (SMD) chip components for hearing aid applications. The practical application and analysis of lead-free solder for hearing aids will include the comprehensive failure analysis of the SMD components and compare the modeling and analysis of the two different solder types through the DOE process.

Study on electromigration in flip chip lead-free solder connections with 40 μm or 30 μm diameter on thin film ceramic substrates

2015 ◽  
Vol 2015 (1) ◽  
pp. 000799-000805
Author(s):  
Marek Gorywoda ◽  
Rainer Dohle ◽  
Bernd Kandler ◽  
Bernd Burger
Keyword(s):  
Thin Film ◽  
High Stability ◽  
Flip Chip ◽  
Lead Free ◽  
Published Data ◽  
Organic Substrates ◽  
Lead Free Solder ◽  
Ceramic Substrates ◽  
Solder Bumps ◽  
Free Solder

Electromigration comprises one of the processes affecting the long-term reliability of electronic devices; it has therefore been the focus of many investigations in recent years. In regards to flip chip packaging technology, the majority of published data is concerned with electromigration in solder connections to metallized organic substrates. Hardly any information is available in the literature on electromigration in lead-free solder connections on thin film ceramic substrates. This work presents results of a study of electromigration in lead-free (SAC305) flip chip solder bumps with a nominal diameter of 40 μm or 30 μm with a pitch of 100 μm on silicon chips assembled onto thin film Al2O3 ceramic substrates. The under bump metallization (UBM) comprised of a 5 μm thick electroless nickel immersion gold (ENIG) layer directly deposited on the AlCu0.5 trace. The ceramic substrates were metallized using a thin film multilayer (NiCr-Au(1.5 μm)-Ni(2 μm) structure on the top of which wettable areas were produced with high precision by depositing flash Au (60 nm) of the required diameter (40 μm or 30 μm). All electromigration tests were performed at the temperature of 125 °C. Initially, one chip assembly with 40 μm and one with 30 μm solder bumps was loaded with the current density of 8 kA/cm2 for 1,000 h. The assemblies did not fail and an investigation with SEM revealed no significant changes to the microstructure of the bumps. Thereafter seven chip assemblies with 40 μm solder bumps and five assemblies with 30 μm bumps were subjected to electromigration tests of 14 kA/cm2 or 25 kA/cm2, respectively. Six of the 40 μm-assemblies failed after 7,000 h and none of the 30 μm-assemblies failed after 2,500 h of test duration so far. Investigation of failed samples performed with SEM and EDX showed asymmetric changes of microstructure in respect to current flow. Several intermetallic phases were found to form in the solder. The predominant damage of the interconnects was found to occur at the cathode contact to chip; the Ni-P layers there showed typical columnar Kirkendall voids caused by migration of Ni from the layers into the solder. Failure of the contacts apparently occurred at the interface between Ni-P and solder. In summary, the results of the study indicate a very high stability of lead-free solder connections on ceramic substrates against electromigration. This high stability is primarily due to a better heat dissipation and thus to a relatively low temperature increase of the ceramic packages caused by resistive heating during flow of electric current. In addition, the type of the metallization used in the study seems to be more resistant to electromigration than the standard PCB metallization as it does not contain a copper layer.

Comparative Modeling and Analysis of Lead-Free Solder Extrusion for the Design of Reliability

2016 ◽  
Vol 2016 (1) ◽  
pp. 000111-000116
Author(s):  
Youngtak Lee ◽  
Doug Link
Keyword(s):  
Design Of Experiments ◽  
Flip Chip ◽  
Failure Modes ◽  
Form Factors ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Modeling And Analysis ◽  
Surface Mount ◽  
Free Solder

Abstract Due to rapid growth of the microelectronics industry, packaged devices with small form factors, low costs, high power performance, and increased efficiency have become of high demand in the market. To realize the current market development trend, flip chip interconnection and System-in-Package (SiP) are some of the promising packaging solutions developed. However, a surprising amount of surface mount technology (SMT) defects are associated with the use of lead-free solder paste and methods by which the paste is applied. Two such defects are solder extrusion and tombstoning. Through the use of design of experiments (DOE), lead-free solder defect causes can be better understood and subsequently reduced or eliminated. This paper will examine the failure modes of solder extrusion and tombstoning that occurred when two different types of lead-free solders, Sn-Ag-Cu (SAC) and BiAgX were used within a SiP for attachment of surface mount devices (SMD) chip components. The systematic investigation will include the comprehensive failure analysis of the SMD components and compare the modeling and analysis of the two different solder types utilizing the design of experiments methods.

Thermally Activated Bumping Process using Sn3.0Ag0.5Cu Solder Powder for Low-Cost Interposers

2013 ◽  
Vol 2013 (1) ◽  
pp. 000420-000423
Author(s):  
Kwang-Seong Choi ◽  
Ho-Eun Bae ◽  
Haksun Lee ◽  
Hyun-Cheol Bae ◽  
Yong-Sung Eom
Keyword(s):  
Screen Printing ◽  
Flip Chip ◽  
Solder Bump ◽  
Low Cost ◽  
Organic Substrate ◽  
Lead Free ◽  
Lead Free Solder ◽  
Thermally Activated ◽  
Fine Pitch ◽  
Free Solder

A novel bumping process using solder bump maker (SBM) is developed for fine-pitch flip chip bonding. It features maskless screen printing process with the result that a fine-pitch, low-cost, and lead-free solder-on-pad (SoP) technology can be easily implemented. The process includes two main steps: one is the thermally activated aggregation of solder powder on the metal pads on a substrate and the other is the reflow of the deposited powder on the pads. Only a small quantity of solder powder adjacent to the pads can join the first step, so a quite uniform SoP array on the substrate can be easily obtained regardless of the pad configurations. Through this process, an SoP array on an organic substrate with a pitch of 130 μm is, successfully, formed.

Enabling Cu Pillar Flip Chip Assembly with Water Soluble Lead-free Solder Paste

2019 ◽  
Author(s):  
B. Senthil Kumar ◽  
Bayaras Abito Danila ◽  
Chong Mei Hoe Joanne ◽  
Zhang Rui Fen ◽  
Santosh Kumar Rath ◽  
...  
Keyword(s):  
Flip Chip ◽  
Water Soluble ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
Cu Pillar ◽  
Flip Chip Assembly ◽  
Free Solder

Experimental Study of Void Formation in Eutectic and Lead-Free Solder Bumps of Flip-Chip Assemblies

2005 ◽  
Vol 128 (3) ◽  
pp. 202-207 ◽  
Author(s):  
Daijiao Wang ◽  
Ronald L. Panton
Keyword(s):  
Experimental Study ◽  
Heat Flux ◽  
Flip Chip ◽  
Void Formation ◽  
Lead Free ◽  
Void Volume ◽  
Lead Free Solder ◽  
Solder Bumps ◽  
Free Solder ◽  
High Lead

This paper reports the experimental findings of void formation in eutectic and lead-free solder joints of flip-chip assemblies. A previous theory indicated that the formation of voids is determined by the direction of heating. The experiments were designed to examine the size and location of voids in the solder samples subject to different heat flux directions. A lead-free solder (Sn-3.5Ag-0.75Cu) and a eutectic solder (63Sn37Pb) were employed in the experiments. Previous experiments [Wang, D., and Panton, R. L., 2005, “Experimental Study of Void Formation in High-Lead Solder Joints of Flip-Chip Assemblies,” ASME J. Electron. Packag., 127(2), pp. 120–126; 2005, “Effect of Reversing Heat Flux Direction During Reflow on Void Formation in High-Lead Solder Bumps,” ASME J. Electron. Packag., 127(4), pp. 440–445] employed a high lead solder. 288 solder bumps were processed for each solder. Both eutectic and lead-free solder have shown fewer voids and much smaller void volume than those for high-lead solder. Compared with lead-free solder, eutectic solder has a slightly lower void volume and a lower percentage of defective bumps. For both eutectic and lead-free solders, irrespective of the cooling direction, heating solder samples from the top shows fewer defective bumps and smaller void volume. No significant effect on void formation for either eutectic or lead-free solder was found via reversing the heat flux direction during cooling. Unlike high-lead solder, small voids in eutectic or lead-free solder comprised 35-88% of the total void volume. The final distribution of voids shows a moderate agreement with thermocapillary theory, indicating the significance of the temperature gradient on the formation of voids.

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