Modeling and Simulation of 3D MEMS Integrated RF Circuits

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 002006-002027
Author(s):  
Bruce Kim ◽  
Sukeshwar Kannan ◽  
Anurag Gupta ◽  
Naga Sai Evana

Today's integrated packaging consists of analog, mixed-signal and RF circuits. These integrated packages are now available in 3-D which makes it extremely difficult to test for defects and their circuit functionalities. This paper provides 3D MEMS integrated packaging which provides self testing and calibrations to overcome process defects and out of spec circuits inside the package making the package self heal itself in case of faults and defects. We have worked on TSV based 3D packaging with MEMS switches to perform self calibrations. We developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated on an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. We used arrays of MEMS switches to perform self testing. We have considered a low noise amplifier as the reference RF circuit which operates between 4 GHz and 6 GHz. The entire validation of the design using test technique and self-calibration of the RF circuit is automated using the calibration algorithm. The paper presents defects in TSV due to mechanical stress and thermal changes.

2011 ◽  
Vol 2011 (DPC) ◽  
pp. 000926-000951
Author(s):  
Bruce C. Kim ◽  
Sai Evana ◽  
Rahim Kasim

This paper provides development of MEMS switches and packaging of MEMS to test radio frequency circuits used in wireless products such as cell phones and network routers. We discuss fabrication of MEMS using low voltage magnetic materials and their configurations to achieve the optimum switch to test RF low noise amplifiers. We have accomplished a very unique methodology to test low noise amplifiers using built-in sellf-test technique and our MEMS switches are proposed to achieve the verification of low noise amplifiers. Furthermore, we have used MEMS switches that we developed to perform self calibration to correct for the parametric variations and faults within the deep submicron CMOS circuits. We also discuss packaging of MEMS and low noise amplifier using 3D TSV technology.


2011 ◽  
Vol 8 (4) ◽  
pp. 154-163
Author(s):  
Bruce C. Kim ◽  
Sukeshwar Kannan ◽  
Sai Shravan Evana ◽  
Seok-Ho Noh

In this paper, we present MEMS-enhanced integrated package design which provides the capability to self-test and self-calibrate integrated circuit chips. We have developed a novel test technique where the test stimulus is generated by modulating the RF carrier signal with another signal mixed with additive white Gaussian noise. This novel test stimulus is provided as the input to the RF circuit and the peak-to-average ratio (PAR) is measured at the output. Simulations were carried out for fault-free and fault-induced circuit conditions, and their corresponding PARs were stored in the look-up table (LUT). Test simulations were performed and the results were compared with the look-up table to verify whether the device is fault-free. In faulty circuit conditions, calibration was performed using a tuning circuit made of MEMS switches. The entire validation of the design using the test technique and self-calibration of the RF circuit was automated using the calibration algorithm. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.


2016 ◽  
Vol 833 ◽  
pp. 135-139
Author(s):  
Dayang Nur Salmi Dharmiza Awang Salleh ◽  
Rohana Sapawi

Recent technology requires multistandard Radio Frequency (RF) chips for multipurpose wireless applications. In RF circuits, a low-noise amplifier (LNA) plays the key role in determining the receiver’s performance. With CMOS technology scaling, various designs has been adopted to study circuit’s characteristic and variation. In this paper, we present the results of scalable wideband LNA design based on complementary metal oxide semiconductor (CMOS), with its variance study. The design was fabricated in 180nm, 90nm, 65nm and 40nm CMOS technology.


2021 ◽  
Vol 5 (1) ◽  
Author(s):  
Deddy Susilo ◽  
Budihardja Murtianta ◽  
Nathanael Adharta Livendra Murtianta

ABSTRACT:In a wireless communication system, the transmitter and receiver are basic components that have a role in the telecommunications system. The receiving system serves to receive an information signal. The basic structure of a radio frequency receiver system, namely: antenna - low pass filter - low noise amplifier (LNA) - mixer - phase lock loop (PLL) - demodulator - audio output. This article describes an empirical study of the GRF-3300 Receiver RF Circuit Training System by presenting the results of system testing which are very easy to understand, including the workings and functions of the receiver system props and the basic modules used in the receiving system, so that it can be used help electrical engineering students, especially telecommunications engineering majors. From the test results, the RF Circuit Training System GRF-3300 receiver training kit produces a Total Harmonic Distortion test value of around 5% when an input signal of 1Vrms is given.ABSTRAK:Pada sistem komunikasi nirkabel, pemancar dan penerima merupakan komponen mendasar yang berperan dalam sistem telekomunikasi. Sistem penerima berfungsi untuk menerima suatu sinyal informasi. Struktur dasar sistem penerima frekuensi radio yaitu: antena – low pass filter – low noise amplifier (LNA) – mixer – phase lock loop (PLL) – demodulator – audio output. Dalam artikel ini menjelaskan tentang studi empiris Receiver RF Circuit Training System GRF-3300 dengan hasil pengujian yang mudah dimengerti, meliputi cara kerja dan fungsi pada alat peraga sistem penerima serta modul-modul struktur dasar yang digunakan dalam sistem penerima, sehingga dapat membantu mahasiwa teknik elektro khususnya jurusan teknik telekomunikasi. Dari hasil pengujian, alat peraga penerima RF Circuit Training System GRF-3300 menghasilkan nilai THD sekitar 5% pada sinyal masukan sebesar 1Vrms.


2011 ◽  
Vol 2011 (1) ◽  
pp. 000635-000640
Author(s):  
Sukeshwar Kannan ◽  
Bruce Kim ◽  
Naga Sai Evana ◽  
Anurag Gupta ◽  
Seok-Ho Noh

This paper presents MEMS enhanced integrated packaging which provides testing and self-calibration to identify process-related defects and out of specification circuits, thereby enabling the package to calibrate itself in case of faults and defects to designed performance levels. We have developed a novel multi-tone dither test technique where the test stimulus is generated by modulating the RF carrier signal with a multi-tone signal generated using an Arbitrary Waveform Generator (AWG) with additive white Gaussian noise. This test stimulus is provided as input to the RF circuit and peak-to-average ratio (PAR) is measured at the output. For a faulty circuit, a significant difference is observed in the value of PAR as compared to a fault-free circuit. Simulation is performed for various circuit conditions such as fault-free as well as fault-induced and their corresponding PARs are stored in the look-up table. Hardware testing is performed and the results are compared with the look-up table to verify whether the device is fault-free. In faulty circuit conditions, calibration is performed using a tuning circuit which consists of MEMS switches. The entire validation of the design using test technique and self-calibration of the RF circuit is automated using the calibration algorithm. This testing and self-calibration technique is exhaustive and efficient for present-day communication systems.


2018 ◽  
Vol E101.C (1) ◽  
pp. 82-90
Author(s):  
Chang LIU ◽  
Zhi ZHANG ◽  
Zhiping WANG

Author(s):  
Z. Zhang ◽  
Z.H. Li ◽  
W.R. Zhang ◽  
F.Y. Zhao ◽  
C.L. Chen ◽  
...  

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