scholarly journals A REDUCED SWITCH THIRTEEN LEVEL INVERTER FOR PHOTOVOLTAIC APPLICATIONS

2021 ◽  
pp. 71-75
Author(s):  
Mr.A.VinothKumar ◽  
Dr.S.Vijayabaskar ◽  
Ms.C.Selsiya
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Power Converters ◽  
Renewable Energy Sources ◽  
Photovoltaic Applications ◽  
Multi Level ◽  
Photo Voltaic ◽  
Inverter Topology ◽  
Lower Voltage

The demand for clean and sustainable energy has prompted research into all types of renewable energy sources, including solar energy generated by photovoltaic systems. We suggest a new multi level inverter topology in this paper. This paper looks at a PV-based 13-level multi level inverter with fewer switches. The most gainful power converters for high power applications and modern applications with fewer switches are multi level inverters. PWM methodology is used to manage the proposed topology. The proposed topology has one of the highest efficiency and lower voltage THD. The inverter produces output voltage in thirteen levels: Vdc, Vdc/2, Vdc/3, Vdc/4, Vdc/5, Vdc/6, 0, -Vdc, -Vdc/2, -Vdc/3, -Vdc/4, -Vdc/5 and -Vdc/6. The validity of the proposed inverter is verified through simulation. KEY WORDS: Pulse Width modulation (PWM), Photo Voltaic (PV) Source.

A new three-phase multilevel DC-link inverter topology with reduced switch count for photovoltaic applications

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Anbarasan P. ◽  
Krishnakumar V. ◽  
Ramkumar S. ◽  
Venkatesan S.
Keyword(s):  
Power Loss ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Photovoltaic Cell ◽  
Content Type ◽  
Energy Applications ◽  
Three Phase ◽  
Photovoltaic Applications ◽  
Inverter Topology

Purpose This paper aims to propose a new MLI topology with reduced number of switches for photovoltaic applications. Multilevel inverters (MLIs) have been found to be prospective for renewable energy applications like photovoltaic cell, as they produce output voltage from numerous separate DC sources or capacitor banks with reduced total harmonic distortion (THD) because of a staircase like waveform. However, they endure from serious setbacks including larger number of capacitors, isolated DC sources, associated gate drivers and increased control difficulty for higher number of voltage levels. Design/methodology/approach This paper proposes a new three-phase multilevel DC-link inverter topology overpowering the previously mentioned problems. The proposed topology is designed for five and seven levels in Matlab/Simulink with gating pulse using multicarrier pulse width modulation. The hardware results are shown for a five-level MLI to witness the viability of the proposed MLI for medium voltage applications. Findings The comparison of the proposed topology with other conventional and other topologies in terms of switch count, DC sources and power loss has been made in this paper. The reduction of switches in proposed topology results in reduced power loss. The simulation and hardware show that the output voltage yields a very close sinusoidal voltage and lesser THD. Originality/value The proposed topology can be extended for any level of output voltage which is helpful for sustainable source application.

Hardware Implementation of Cascaded Hybrid Multilevel Inverter with Reduced Number of Switches

2016 ◽  
Vol 3 (2) ◽  
pp. 314
Author(s):  
Chinnapettai Ramalingam Balamurugan ◽  
S.P. Natarajan ◽  
T.S. Anandhi ◽  
R. Bensaraj
Keyword(s):  
Phase Shift ◽  
Pulse Width ◽  
Output Voltage ◽  
Degrees Of Freedom ◽  
Hardware Implementation ◽  
Pulse Width Modulation ◽  
Multilevel Inverter ◽  
Variable Frequency ◽  
Multi Level ◽  
Simulation Results

<p class="JESTECAbstract">This paper presents the comparison of various multicarrier Pulse Width Modulation (PWM) techniques for the Cascaded Hybrid Multi Level Inverter (CHBMLI). Due to switch combination redundancies, there are certain degrees of freedom to generate the five level AC output voltage. This paper presents the use of Control Freedom Degree (CFD) combination. The effectiveness of the PWM strategies developed using CFD are demonstrated by simulation and experimentation.  The simulation results indicate that the chosen five level inverter triggered by the developed Phase Disposition(PD), Phase Opposition and Disposition(POD), Alternate Phase Opposition and Disposition (APOD), Carrier Overlapping (CO), Phase Shift (PS) and Variable Frequency (VF)<strong> </strong>PWM strategies developed are implemented in real time using FPGA. The simulation and experimental outputs closely match with each other validating the strategies presented.</p>

scholarly journals Design and Implementation of PV Z source Inverter Topology

2019 ◽  
Vol 9 (1) ◽  
pp. 4391-4395
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Analytical Approach ◽  
Pulse Width Modulation ◽  
Boost Converter ◽  
Design And Implementation ◽  
Cascade Connection ◽  
Modulation Techniques ◽  
Pv Modules ◽  
Inverter Topology

Photovoltaic energy is one of the ruling area due to it’s easy availability and pollution free nature. At the same time the voltage from the PV is needed to be stepped up for different load requirements. There are various pulse width modulation techniques for the control of impedance Source inverter(ZSI).Here we have considered Carrier based various PWM techniques for PV-ZSI Converter. The proposed converter consists of cascade connection of PV Modules and Conventional-ZSI which provides higher boosting factor and smaller size than that of existing VSI .The performance of inverters depend on the type of modulation technique used to switch them. This work depicts a detailed analytical approach in MATLAB/Simulink platform as well hardware consists of sine triangle PWM method for proposed new topology PV-ZSI. It has been observed output voltage of proposed inverter is more in comparison to conventional VSI. As the proposed inverter is lesser in size and output voltage is greater so it is more efficient than conventional VSI. There is no requirement of Boost converter .

scholarly journals Simulation of Switched Capacitor Inverter Topology with Boost Facility

2019 ◽  
Vol 8 (3) ◽  
pp. 616-619
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Low Frequency ◽  
Switched Capacitor ◽  
Voltage Level ◽  
Switching Losses ◽  
Photo Voltaic ◽  
Simulation Results ◽  
Inverter Topology

Simulation of switched capacitor inverter topology with boost facility is presented in this paper. The main merits of this inverter topology with boos facility are highly adaptable for Photo Voltaic (PV) applications. The inverter is capable of boosting up low voltage DC into high voltage DC and then invert it to the required voltage level with a single stage. The switched capacitor inverter has a special extended structure, which minimizes the number of components and devices when compared to the other inverter is switched by the means of level shifting carrier based Pulse Width Modulation (PWM) technique. Further, some of the switches in the topology operate in the low frequency and this resulted in a reduction in switching losses thereby increasing the efficiency. This maintains the capacitor voltages at a balanced level. The simulation results are verified through MATLAB/Simulink.

scholarly journals A new seven level boost-type ANPC inverter topology for photovoltaic applications

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Jagabar Sathik M. ◽  
Dhafer J. Almakhles
Keyword(s):  
Power Loss ◽  
Output Voltage ◽  
Detailed Comparison ◽  
Input Voltage ◽  
Neutral Point ◽  
Type Structure ◽  
Photovoltaic Applications ◽  
Capacitor Voltage ◽  
Floating Capacitor ◽  
Inverter Topology

AbstractDeveloping of new photovoltaic inverter topologies is received more attention in the last few years. In particular, designing an active neutral-point-clamping inverter type structure is quite popular for PV applications. The output voltage is always half of the input voltage (vin), which further increases the voltage rating of dc-link capacitors in the conventional three-level ANPC. To rectify the above problem and increase the output voltage by reducing dc-link capacitors voltage rating, a new boost type seven-level ANPC inverter topology is proposed. The proposed topology consists of seven switches and one floating capacitor. The floating capacitor voltage is self-balanced, and the output voltage is 1.5 times higher than the input voltage. A detailed comparison for some power components, power loss and cost with other existing topologies are presented. Further, the proposed topology is validated in a prototype hardware setup for different load values.

scholarly journals Performance Improvement of Sensorless Vector Controlled Induction Motor Drive for Medium Power Applications

2019 ◽  
Vol 9 (2) ◽  
pp. 2061-2068
Keyword(s):  
Induction Motor ◽  
Performance Improvement ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Motor Drive ◽  
Induction Motor Drive ◽  
Space Vector ◽  
Torque Pulsations ◽  
Multi Level ◽  
Simulation Results

This paper deals with sensorless vector controlled induction motor in which torque pulsations are reduced with improved input of induction motor. In proposed technique two multi winding transformers are used for generation of 18 sinusoidal signals given to rectifier unit and the rectifier output given as input to 9 level multi level inverter. In this proposed technique gating signals to the inverter switches will be provided through space vector pulse width modulation which considers speed as reference. This configuration was simulated in MATLAB/Simulink.and the simulation results are presented here with improvement in reduction of THD.

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