Detail Specification: Fixed low power film high stability SMD resistors - Rectangular - Stability classes 0,1; 0,25

2019 ◽  
Keyword(s):  
Low Power ◽  
High Stability

scholarly journals Design of a high-stability heterogeneous clock system for small satellites in LEO

GPS Solutions ◽  
2021 ◽  
Vol 25 (3) ◽  
Author(s):  
Damon Van Buren ◽  
Penina Axelrad ◽  
Scott Palo
Keyword(s):  
Low Power ◽  
High Stability ◽  
Time Frame ◽  
System Stability ◽  
Small Satellite ◽  
Crystal Oscillator ◽  
Small Satellites ◽  
Clock System ◽  
Wide Range

AbstractWe describe our investigation into the performance of low-power heterogeneous timing systems for small satellites, using real GPS observables from the GRACE Follow-On mission. Small satellites have become capable platforms for a wide range of commercial, scientific and defense missions, but they are still unable to meet the needs of missions that require precise timing, on the order of a few nanoseconds. Improved low-power onboard clocks would make small satellites a viable option for even more missions, enabling radio aperture interferometry, improved radio occultation measurements, high altitude GPS navigation, and GPS augmentation missions, among others. One approach for providing improved small satellite timekeeping is to combine a heterogeneous group of oscillators, each of which provides the best stability over a different time frame. A hardware architecture that uses a single-crystal oscillator, one or more Chip Scale Atomic Clocks (CSACs) and the reference time from a GPS receiver is presented. The clocks each contribute stability over a subset of timeframes, resulting in excellent overall system stability for timeframes ranging from less than a second to several days. A Kalman filter is used to estimate the long-term errors of the CSACs based on the CSAC-GPS time difference, and the improved CSAC time is used to discipline the crystal oscillator, which provides the high-stability reference clock for the small satellite. Simulations using GRACE-FO observations show time error standard deviations for the system range from 2.3 ns down to 1.3 ns for the clock system, depending on how many CSACs are used. The results provide insight into the timing performance which could be achieved on small LEO spacecraft by a low power timing system.

Low Power FGSRAM Cell Using Sleepy and LECTOR Technique

2016 ◽  
Vol 4 (2) ◽  
pp. 333 ◽  
Author(s):  
Kanan Bala Ray ◽  
Sushanta Kumar Mandal ◽  
Shivalal Patro
Keyword(s):  
Low Power ◽  
Power Supply ◽  
High Stability ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Floating Gate ◽  
Power Supply Voltage ◽  
Operation Analysis ◽  
Sram Cell ◽  
Simulation Results

<em>In this paper floating gate MOS (FGMOS) along with sleep transistor technique and leakage control transistor (LECTOR) technique has been used to design low power SRAM cell. Detailed investigation on operation, analysis and result comparison of conventional 6T, FGSRAM, FGSLEEPY, FGLECTOR and FGSLEEPY LECTOR has been done. All the simulations are done in Cadence Virtuoso environment on 45 nm standard CMOS technology with 1 V power supply voltage. Simulation results show that FGSLEEPY LECTOR SRAM cell consumes very low power and achieves high stability compared to conventional FGSRAM Cell</em>

Flexible cholesteric films with super-reflectivity and high stability based on a multi-layer helical structure

2017 ◽  
Vol 5 (41) ◽  
pp. 10828-10833 ◽  
Author(s):  
Y. Li ◽  
Y. J. Liu ◽  
H. T. Dai ◽  
X. H. Zhang ◽  
D. Luo ◽  
...  
Keyword(s):  
Low Power ◽  
Mechanical Stress ◽  
High Stability ◽  
Environmental Influences ◽  
Helical Structure ◽  
High Quality ◽  
Display Devices ◽  
Working Temperature ◽  
Flexible Materials ◽  
Temperature Ranges

The growing demand for flexible low-power reflective photonics and display devices has fueled research into high quality flexible materials with super-reflectivity and high stability to environmental influences including broad working temperature ranges and excellent mechanical stress insensitivity.

A novel indirect read technique based SRAM with ability to charge recycle and differential read for low power consumption, high stability and performance

2020 ◽  
Vol 97 ◽  
pp. 104723 ◽  
Author(s):  
Debasish Nayak ◽  
Prakash Kumar Rout ◽  
Sudhakar Sahu ◽  
Debiprasad Priyabrata Acharya ◽  
Umakanta Nanda ◽  
...  
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
High Stability ◽  
Low Power Consumption ◽  
And Performance

Ultra low power-high stability, positive feedback controlled (PFC) 10T SRAM cell for look up table (LUT) design

Integration ◽  
2018 ◽  
Vol 62 ◽  
pp. 1-13 ◽  
Author(s):  
P. Singh ◽  
B.S. Reniwal ◽  
V. Vijayvargiya ◽  
V. Sharma ◽  
S.K. Vishvakarma
Keyword(s):  
Low Power ◽  
Positive Feedback ◽  
High Stability ◽  
Ultra Low Power ◽  
Look Up Table ◽  
Sram Cell
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