Crystalline silicon photovoltaic (PV) array. On-site measurement of I-V characteristics

1998 ◽  
Keyword(s):  
Crystalline Silicon ◽  
Pv Array

Development of Mathematical Equation for Photovoltaic Array Internal Resistance Measurement under Operating Conditions

2016 ◽  
Vol 839 ◽  
pp. 59-64
Author(s):  
Nattawut Khaosaad ◽  
Nipon Ketjoy ◽  
Sarayooth Vaivudh ◽  
Kobsak Sriprapha
Keyword(s):  
Series Resistance ◽  
Crystalline Silicon ◽  
Internal Resistance ◽  
Standard Test ◽  
Operating Conditions ◽  
Resistance Measurement ◽  
Shunt Resistance ◽  
Photovoltaic Array ◽  
Pv Array ◽  
Linear Regression Technique

A novel technique has been developed for PV array internal resistance measurement while keeping the plant in operation in contrary to flash test or basic equation (Eb) for which the modules need to be disconnected from the system. We present an equation developed for the array’s internal resistance measurement for PV technologies namely Amorphous Silicon (a-Si), Poly Crystalline Silicon (p-Si) and Hybrid Crystalline Silicon (HIT). Monthly Measured I-V characteristic curves of PV Array were converted to Standard Test Conditions following the IEC 60891 standard. Multiple regression analysis and linear regression technique were used to develop the equation for estimating the PV array internal resistance. The developed equations (Ed) will find the relationships of the 4 variables that are Series resistance (Rs), Shunt resistance (Rsh), maximum voltage (Vm) and maximum current (Im). The results revealed that the Ed can be applied to measure the PV array internal resistance value with low error margin than Eb. The series resistance calculated using Ed is higher than Eb about 1.11 %, 1.88 % and 0.87 % for a-Si, p-Si and HIT respectively. The shunt resistance calculated using Ed is higher than Eb about 0.07 %, 0.09 % and 0.09% for a-Si, p-Si and HIT respectively.

Thermal Patterns in PV Arrays Operating in Tropical Conditions: A Preliminary Approach

2013 ◽  
Author(s):  
Rolando Soler-Bientz ◽  
Lifter Ricalde-Cab ◽  
Inés Riech Méndez
Keyword(s):  
Wind Speed ◽  
Crystalline Silicon ◽  
Geographical Location ◽  
Temperature Sensors ◽  
Research System ◽  
Pv Array ◽  
Pv Module ◽  
Tropical Conditions ◽  
Pv Modules ◽  
Thermal Patterns

This paper presents preliminary results of a field study focused in the study of the heat patterns of a PV array in tropical conditions. The research system is comprised by four sub arrays of four mono-crystalline Silicon PV Modules. The system was installed facing to the South direction in a static configuration according to the geographical location of the study site. A set of temperature sensors were installed on the back of the PV module in order to monitor their thermal patterns on daily basics. Ambient temperature, solar radiation on the PV surface and on the horizontal surface as well as the wind speed and wind direction have been also monitored concurrently with the thermal patterns of the whole PV array under study.

Recombination Characteristics of Single-Crystalline Silicon Wafers with a Damaged Near-Surface Layer

2013 ◽  
Vol 58 (2) ◽  
pp. 142-150 ◽  
Author(s):  
A.V. Sachenko ◽  
◽  
V.P. Kostylev ◽  
V.G. Litovchenko ◽  
V.G. Popov ◽  
...  
Keyword(s):  
Surface Layer ◽  
Crystalline Silicon ◽  
Silicon Wafers ◽  
Single Crystalline Silicon ◽  
Near Surface ◽  
Single Crystalline

Formation of Nanocrystalline Silicon in Tin-Doped Amorphous Silicon Films

2020 ◽  
Vol 65 (3) ◽  
pp. 236
Author(s):  
R. M. Rudenko ◽  
O. O. Voitsihovska ◽  
V. V. Voitovych ◽  
M. M. Kras’ko ◽  
A. G. Kolosyuk ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Crystalline Silicon ◽  
Solid Phase ◽  
Nanocrystalline Silicon ◽  
Recrystallization Temperature ◽  
Nanocrystalline Phase ◽  
Silicon Phase ◽  
Silicon Nanocrystallites ◽  
Lower Temperature ◽  
Two Stages

The process of crystalline silicon phase formation in tin-doped amorphous silicon (a-SiSn) films has been studied. The inclusions of metallic tin are shown to play a key role in the crystallization of researched a-SiSn specimens with Sn contents of 1–10 at% at temperatures of 300–500 ∘C. The crystallization process can conditionally be divided into two stages. At the first stage, the formation of metallic tin inclusions occurs in the bulk of as-precipitated films owing to the diffusion of tin atoms in the amorphous silicon matrix. At the second stage, the formation of the nanocrystalline phase of silicon occurs as a result of the motion of silicon atoms from the amorphous phase to the crystalline one through the formed metallic tin inclusions. The presence of the latter ensures the formation of silicon crystallites at a much lower temperature than the solid-phase recrystallization temperature (about 750 ∘C). A possibility for a relation to exist between the sizes of growing silicon nanocrystallites and metallic tin inclusions favoring the formation of nanocrystallites has been analyzed.

Analysis of an Anomalous CMOS Transistor Exhibiting Drain to Source Leakage—Its Model and Cause

2014 ◽  
Author(s):  
Yuk L. Tsang ◽  
Alex VanVianen ◽  
Xiang D. Wang ◽  
N. David Theodore
Keyword(s):  
Threshold Voltage ◽  
Crystalline Silicon ◽  
Electrical Characterization ◽  
Visual Defect ◽  
Scanning Capacitance Microscopy ◽  
Device Model ◽  
Graphical Simulation ◽  
Cmos Transistor

Abstract In this paper, we report a device model that has successfully described the characteristics of an anomalous CMOS NFET and led to the identification of a non-visual defect. The model was based on detailed electrical characterization of a transistor exhibiting a threshold voltage (Vt) of about 120mv lower than normal and also exhibiting source to drain leakage. Using a simple graphical simulation, we predicted that the anomalous device was a transistor in parallel with a resistor. It was proposed that the resistor was due to a counter doping defect. This was confirmed using Scanning Capacitance Microscopy (SCM). The dopant defect was shown by TEM imaging to be caused by a crystalline silicon dislocation.

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