scholarly journals A Scaling Law for SPAD Pixel Miniaturization

Sensors ◽  
2021 ◽  
Vol 21 (10) ◽  
pp. 3447
Author(s):  
Kazuhiro Morimoto ◽  
Edoardo Charbon

The growing demands on compact and high-definition single-photon avalanche diode (SPAD) arrays have motivated researchers to explore pixel miniaturization techniques to achieve sub-10 m pixels. The scaling of the SPAD pixel size has an impact on key performance metrics, and it is, thereby, critical to conduct a systematic analysis of the underlying tradeoffs in miniaturized SPADs. On the basis of the general assumptions and constraints for layout geometry, we performed an analytical formulation of the scaling laws for the key metrics, such as the fill factor (FF), photon detection probability (PDP), dark count rate (DCR), correlated noise, and power consumption. Numerical calculations for various parameter sets indicated that some of the metrics, such as the DCR and power consumption, were improved by pixel miniaturization, whereas other metrics, such as the FF and PDP, were degraded. Comparison of the theoretically estimated scaling trends with previously published experimental results suggests that the scaling law analysis is in good agreement with practical SPAD devices. Our scaling law analysis could provide a useful tool to conduct a detailed performance comparison between various process, device, and layout configurations, which is essential for pushing the limit of SPAD pixel miniaturization toward sub-2 m-pitch SPADs.

Author(s):  
Shitesh Tiwari ◽  
Sumant Katiyal ◽  
Parag Parandkar

Voltage Controlled Oscillator (VCO) is an integral component of most of the receivers such as GSM, GPS etc. As name indicates, oscillation is controlled by varying the voltage at the capacitor of LC tank. By varying the voltage, VCO can generate variable frequency of oscillation. Different VCO Parameters are contrasted on the basis of phase noise, tuning range, power consumption and FOM. Out of these phase noise is dependent on quality factor, power consumption, oscillation frequency and current. So, design of LC VCO at low power, low phase noise can be obtained with low bias current at low voltage.  Nanosize transistors are also contributes towards low phase noise. This paper demonstrates the design of low phase noise LC VCO with 4.89 GHz tuning range from 7.33-11.22 GHz with center frequency at 7 GHz. The design uses 32nm technology with tuning voltage of 0-1.2 V. A very effective Phase noise of -114 dBc / Hz is obtained with FOM of -181 dBc/Hz. The proposed work has been compared with five peer LC VCO designs working at higher feature sizes and outcome of this performance comparison dictates that the proposed work working at better 32 nm technology outperformed amongst others in terms of achieving low Tuning voltage and moderate FoM, overshadowed by a little expense of power dissipation. 


2021 ◽  
Vol 11 (3) ◽  
pp. 1225
Author(s):  
Woohyong Lee ◽  
Jiyoung Lee ◽  
Bo Kyung Park ◽  
R. Young Chul Kim

Geekbench is one of the most referenced cross-platform benchmarks in the mobile world. Most of its workloads are synthetic but some of them aim to simulate real-world behavior. In the mobile world, its microarchitectural behavior has been reported rarely since the hardware profiling features are limited to the public. As a popular mobile performance workload, it is hard to find Geekbench’s microarchitecture characteristics in mobile devices. In this paper, a thorough experimental study of Geekbench performance characterization is reported with detailed performance metrics. This study also identifies mobile system on chip (SoC) microarchitecture impacts, such as the cache subsystem, instruction-level parallelism, and branch performance. After the study, we could understand the bottleneck of workloads, especially in the cache sub-system. This means that the change of data set size directly impacts performance score significantly in some systems and will ruin the fairness of the CPU benchmark. In the experiment, Samsung’s Exynos9820-based platform was used as the tested device with Android Native Development Kit (NDK) built binaries. The Exynos9820 is a superscalar processor capable of dual issuing some instructions. To help performance analysis, we enable the capability to collect performance events with performance monitoring unit (PMU) registers. The PMU is a set of hardware performance counters which are built into microprocessors to store the counts of hardware-related activities. Throughout the experiment, functional and microarchitectural performance profiles were fully studied. This paper describes the details of the mobile performance studies above. In our experiment, the ARM DS5 tool was used for collecting runtime PMU profiles including OS-level performance data. After the comparative study is completed, users will understand more about the mobile architecture behavior, and this will help to evaluate which benchmark is preferable for fair performance comparison.


2020 ◽  
Vol 379 (1) ◽  
pp. 103-143
Author(s):  
Oleg Kozlovski ◽  
Sebastian van Strien

Abstract We consider a family of strongly-asymmetric unimodal maps $$\{f_t\}_{t\in [0,1]}$$ { f t } t ∈ [ 0 , 1 ] of the form $$f_t=t\cdot f$$ f t = t · f where $$f:[0,1]\rightarrow [0,1]$$ f : [ 0 , 1 ] → [ 0 , 1 ] is unimodal, $$f(0)=f(1)=0$$ f ( 0 ) = f ( 1 ) = 0 , $$f(c)=1$$ f ( c ) = 1 is of the form and $$\begin{aligned} f(x)=\left\{ \begin{array}{ll} 1-K_-|x-c|+o(|x-c|)&{} \text{ for } x<c, \\ 1-K_+|x-c|^\beta + o(|x-c|^\beta ) &{} \text{ for } x>c, \end{array}\right. \end{aligned}$$ f ( x ) = 1 - K - | x - c | + o ( | x - c | ) for x < c , 1 - K + | x - c | β + o ( | x - c | β ) for x > c , where we assume that $$\beta >1$$ β > 1 . We show that such a family contains a Feigenbaum–Coullet–Tresser $$2^\infty $$ 2 ∞ map, and develop a renormalization theory for these maps. The scalings of the renormalization intervals of the $$2^\infty $$ 2 ∞ map turn out to be super-exponential and non-universal (i.e. to depend on the map) and the scaling-law is different for odd and even steps of the renormalization. The conjugacy between the attracting Cantor sets of two such maps is smooth if and only if some invariant is satisfied. We also show that the Feigenbaum–Coullet–Tresser map does not have wandering intervals, but surprisingly we were only able to prove this using our rather detailed scaling results.


Author(s):  
Roberto Pani ◽  
Paolo Bennati ◽  
Rosanna Pellegrini ◽  
Maria Nerina Cinti ◽  
Raffaele Scafe' ◽  
...  

2018 ◽  
Vol 75 (3) ◽  
pp. 943-964 ◽  
Author(s):  
Khaled Ghannam ◽  
Gabriel G. Katul ◽  
Elie Bou-Zeid ◽  
Tobias Gerken ◽  
Marcelo Chamecki

Abstract The low-wavenumber regime of the spectrum of turbulence commensurate with Townsend’s “attached” eddies is investigated here for the near-neutral atmospheric surface layer (ASL) and the roughness sublayer (RSL) above vegetation canopies. The central thesis corroborates the significance of the imbalance between local production and dissipation of turbulence kinetic energy (TKE) and canopy shear in challenging the classical distance-from-the-wall scaling of canonical turbulent boundary layers. Using five experimental datasets (two vegetation canopy RSL flows, two ASL flows, and one open-channel experiment), this paper explores (i) the existence of a low-wavenumber k−1 scaling law in the (wind) velocity spectra or, equivalently, a logarithmic scaling ln(r) in the velocity structure functions; (ii) phenomenological aspects of these anisotropic scales as a departure from homogeneous and isotropic scales; and (iii) the collapse of experimental data when plotted with different similarity coordinates. The results show that the extent of the k−1 and/or ln(r) scaling for the longitudinal velocity is shorter in the RSL above canopies than in the ASL because of smaller scale separation in the former. Conversely, these scaling laws are absent in the vertical velocity spectra except at large distances from the wall. The analysis reveals that the statistics of the velocity differences Δu and Δw approach a Gaussian-like behavior at large scales and that these eddies are responsible for momentum/energy production corroborated by large positive (negative) excursions in Δu accompanied by negative (positive) ones in Δw. A length scale based on TKE dissipation collapses the velocity structure functions at different heights better than the inertial length scale.


2013 ◽  
Vol 56 (3) ◽  
Author(s):  
Zhang Qi-sheng ◽  
Deng Ming ◽  
Guo Jian ◽  
Luo Wei-bing ◽  
Wang Qi ◽  
...  

<p>There has been considerable development of seismic detectors over the last 80 years. However, there is still a need to further develop new earthquake exploration and data acquisition systems with high precision. In particular, for China to keep up with the latest technology of these systems, it is important to be involved in the research and development, instead of importing systems that soon fall behind the latest technology. In this study, the features of system-on-a-programmable-chip (SoPC) technology are analyzed and used to design a new digital seismic-data acquisition station. The hardware circuit of the station was developed, and the analog board and the main control data-transmission board were designed according to the needs of digital seismic-data acquisition stations. High-definition analog-to-digital converter sequential digital filter technology of the station (cascade integrator comb filter, finite impulse response digital filter) were incorporated to provide advantages to the acquisition station, such as high definition, large dynamic scope, and low noise. A specific data-transmission protocol was designed for the station, which ensured a transmission speed of 16 Mbps along a 55-m wire with low power consumption. Synchronic acquisition was researched and developed, so as to achieve accuracy better than 200 ns. The key technologies were integrated into the SoPC of the main control data-transmission board, so as to ensure high-resolution acquisition of the station, while improving the accuracy of the synchronic acquisition and data-transmission speed, lowering the power consumption, and preparing for the follow-up efforts to tape out.</p>


Author(s):  
Gioele Zardini ◽  
Nicolas Lanzetti ◽  
Marco Pavone ◽  
Emilio Frazzoli

Challenged by urbanization and increasing travel needs, existing transportation systems need new mobility paradigms. In this article, we present the emerging concept of autonomous mobility-on-demand, whereby centrally orchestrated fleets of autonomous vehicles provide mobility service to customers. We provide a comprehensive review of methods and tools to model and solve problems related to autonomous mobility-on-demand systems. Specifically, we first identify problem settings for their analysis and control, from both operational and planning perspectives. We then review modeling aspects, including transportation networks, transportation demand, congestion, operational constraints, and interactions with existing infrastructure. Thereafter, we provide a systematic analysis of existing solution methods and performance metrics, highlighting trends and trade-offs. Finally, we present various directions for further research. Expected final online publication date for the Annual Review of Control, Robotics, and Autonomous Systems, Volume 5 is May 2022. Please see http://www.annualreviews.org/page/journal/pubdates for revised estimates.


In this research paper compare the protocol’s performance together with the experimental results of optimal routing using real-life scenarios of vehicles and pedestrians roaming in a city. In this research paper, conduct several simulation comparison experiments(in the NS2 Software) to show the impact of changing buffer capacity, packet lifetime, packet generation rate, and number of nodes on the performance metrics. This research paper is concluded by providing guidelines to develop an efficient DTN routing protocol. To the best of researcher(Parameswari et al.,) knowledge, this work is the first to provide a detailed performance comparison among the diverse collection of DTN routing protocols.


Materials ◽  
2018 ◽  
Vol 11 (9) ◽  
pp. 1671 ◽  
Author(s):  
Alexander Griffiths ◽  
Johannes Herrnsdorf ◽  
Christopher Lowe ◽  
Malcolm Macdonald ◽  
Robert Henderson ◽  
...  

Communicating information at the few photon level typically requires some complexity in the transmitter or receiver in order to operate in the presence of noise. This in turn incurs expense in the necessary spatial volume and power consumption of the system. In this work, we present a self-synchronised free-space optical communications system based on simple, compact and low power consumption semiconductor devices. A temporal encoding method, implemented using a gallium nitride micro-LED source and a silicon single photon avalanche photo-detector (SPAD), demonstrates data transmission at rates up to 100 kb/s for 8.25 pW received power, corresponding to 27 photons per bit. Furthermore, the signals can be decoded in the presence of both constant and modulated background noise at levels significantly exceeding the signal power. The system’s low power consumption and modest electronics requirements are demonstrated by employing it as a communications channel between two nano-satellite simulator systems.


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