In this work we propose and evaluate a concept for a selective thermal emitter suitable for monolithic on-chip integration suitable for fabrication by conventional CMOS-compatible processes. The concept is based on our recently presented work on vertical-cavity enhanced resonant thermal emission (VERTE). Here we present the application of this concept to a slab waveguide structure, instead of depositing extended dielectric layers forming a one-dimensional photonic crystal. We optimize the dimension by certain design considerations and geneticalgorithm optimization and demonstrate effective absorbing/emitting properties (depending on different slab heights) of such a low-cost structure by exciting so-called optical Tamm-states on the metal-dielectric interface.
Efficient Vertical-Cavity Mid-IR Thermal Radiation to Silicon-Slab Waveguide Coupling Using a Shallow Blazed Grating