scholarly journals Development of a CMOS-Compatible Carbon Nanotube Array Transfer Method

Micromachines ◽  
2021 ◽  
Vol 12 (1) ◽  
pp. 95
Author(s):  
Chun Fei Siah ◽  
Lucas Yu Xiang Lum ◽  
Jianxiong Wang ◽  
Simon Chun Kiat Goh ◽  
Chong Wei Tan ◽  
...  
Keyword(s):  
High Growth ◽  
Complementary Metal Oxide Semiconductor ◽  
Thermal Interface Material ◽  
Oxide Semiconductor ◽  
Interfacial Resistance ◽  
Alignment Tool ◽  
Starting Point ◽  
Cnt Arrays ◽  
Cmos Compatible ◽  
Transfer Method

Carbon nanotubes (CNTs) have, over the years, been used in research as a promising material in electronics as a thermal interface material and as interconnects amongst other applications. However, there exist several issues preventing the widespread integration of CNTs onto device applications, e.g., high growth temperature and interfacial resistance. To overcome these issues, a complementary metal oxide semiconductor (CMOS)-compatible CNT array transfer method that electrically connects the CNT arrays to target device substrates was developed. The method separates the CNT growth and preparation steps from the target substrate. Utilizing an alignment tool with the capabilities of thermocompression enables a highly accurate transfer of CNT arrays onto designated areas with desired patterns. With this transfer process as a starting point, improvement pointers are also discussed in this paper to further improve the quality of the transferred CNTs.

scholarly journals Synthesis of Vertical Carbon Nanotube Interconnect Structures Using CMOS-Compatible Catalysts

Nanomaterials ◽  
2020 ◽  
Vol 10 (10) ◽  
pp. 1918
Author(s):  
Zichao Ma ◽  
Shaolin Zhou ◽  
Changjian Zhou ◽  
Ying Xiao ◽  
Suwen Li ◽  
...  
Keyword(s):  
Low Temperature ◽  
Complementary Metal Oxide Semiconductor ◽  
Synthesis Temperature ◽  
Catalyst Design ◽  
High Density ◽  
Oxide Semiconductor ◽  
Catalyst Film ◽  
Cnt Arrays ◽  
Cmos Compatible ◽  
Catalyst Nanoparticle

Synthesis of the vertically aligned carbon nanotubes (CNTs) using complementary metal-oxide-semiconductor (CMOS)-compatible methods is essential to integrate the CNT contact and interconnect to nanoscale devices and ultra-dense integrated nanoelectronics. However, the synthesis of high-density CNT array at low-temperature remains a challenging task. The advances in the low-temperature synthesis of high-density vertical CNT structures using CMOS-compatible methods are reviewed. Primarily, recent works on theoretical simulations and experimental characterizations of CNT growth emphasized the critical roles of catalyst design in reducing synthesis temperature and increasing CNT density. In particular, the approach of using multilayer catalyst film to generate the alloyed catalyst nanoparticle was found competent to improve the active catalyst nanoparticle formation and reduce the CNT growth temperature. With the multilayer catalyst, CNT arrays were directly grown on metals, oxides, and 2D materials. Moreover, the relations among the catalyst film thickness, CNT diameter, and wall number were surveyed, which provided potential strategies to control the tube density and the wall density of synthesized CNT array.

scholarly journals Low-Cost 2D Index and Straightness Measurement System Based on a CMOS Image Sensor

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5461 ◽  
Author(s):  
Alain Küng ◽  
Benjamin A. Bircher ◽  
Felix Meli
Keyword(s):  
Measurement System ◽  
Degrees Of Freedom ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Measurement Systems ◽  
Starting Point ◽  
Sensor Properties

Accurate traceable measurement systems often use laser interferometers for position measurements in one or more dimensions. Since interferometers provide only incremental information, they are often combined with index sensors to provide a stable reference starting point. Straightness measurements are important for machine axis correction and for systems having several degrees of freedom. In this paper, we investigate the accuracy of an optical two-dimensional (2D) index sensor, which can also be used in a straightness measurement system, based on a fiber-coupled, collimated laser beam pointing onto an image sensor. Additionally, the sensor can directly determine a 2D position over a range of a few millimeters. The device is based on a simple and low-cost complementary metal–oxide–semiconductor (CMOS) image sensor chip and provides sub-micrometer accuracy. The system is an interesting alternative to standard techniques and can even be implemented on machines for real-time corrections. This paper presents the developed sensor properties for various applications and introduces a novel error separation method for straightness measurements.

Open Circuit Voltage and Single Walled Carbon Nanotube (wt%) Dependency in Solid-State Complementary Metal Oxide Semiconductor-Compatible Glucose Fuel Cells

2020 ◽  
Vol 12 (1) ◽  
pp. 101-106
Author(s):  
Md. Zahidul Islam ◽  
Shigeki Arata ◽  
Kenya Hayashi ◽  
Atsuki Kobayashi ◽  
Kiichi Niitsu
Keyword(s):  
Carbon Nanotube ◽  
Fuel Cell ◽  
Open Circuit Voltage ◽  
Complementary Metal Oxide Semiconductor ◽  
Open Circuit ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Single Walled Carbon Nanotube ◽  
Single Walled Carbon ◽  
Cmos Compatible

Solid-state complementary metal oxide semiconductor (CMOS)-compatible glucose fuel cells, with single-walled carbon nanotube (SWCNT) films and different amounts of carbon nanotube (wt%) were investigated. Those with a SWCNT content of 3 wt% were found to develop the highest open circuit voltage (OCV) of 400 mV, together with a high electrical conductivity, a power density of 0.53 μW/cm2 and current density of 1.31 μA/cm2. Measurements were performed by dipping the anode into a 30 mM glucose solution. The OCV and power density increased together with the fuel cell concentration. The developed fuel cell uses materials that are biocompatible with the human body (single-walled carbon nanotube-glucose). As a result, it was possible to attain an OCV of 400 mV with a single-walled carbon nanotube content of 3 wt% while improvements in the performance of the CMOS-compatible glucose fuel cell were obtained, and the parameters affecting the performance of the fuel cell were identified. This bio-fuel cell was fabricated using CMOS semiconductor processes on a silicon wafer. These findings are significant to realizing mobile or implantable devices that can be used for biomedical applications.

A CMOS Compatible Metal-Polymer Microchannel Heat Sink for Monolithic Chip Cooling Applications

2010 ◽  
Author(s):  
Aziz Koyuncuog˘lu ◽  
Tuba Okutucu ◽  
Haluk Ku¨lah
Keyword(s):  
Heat Sink ◽  
Complementary Metal Oxide Semiconductor ◽  
Heat Sinks ◽  
Oxide Semiconductor ◽  
Microchannel Heat Sink ◽  
Liquid Cooling ◽  
Chip Cooling ◽  
Electronic Circuitry ◽  
Cmos Compatible ◽  
Adjacent Channels

A novel complementary metal oxide semiconductor (CMOS) compatible microchannel heat sink is designed and fabricated for monolithic liquid cooling of electronic circuits. The microchannels are fabricated with full metal walls between adjacent channels with a polymer top layer for easy sealing and optical visibility of the channels. The use of polymer also provides flexibility in adjusting the width of the channels allowing better management of the pressure drop. The proposed microchannel heat sink requires no design change of the electronic circuitry underneath, hence, can be produced by adding a few more steps to the standard CMOS fabrication flow. The microchannel heat sinks were tested successfully under various heat flux and coolant flow rate conditions. The preliminary cooling tests indicate that the proposed design is promising as a monolithic liquid cooling solution for CMOS circuits.

scholarly journals CMOS-compatible photonic devices for single-photon generation

Nanophotonics ◽  
2016 ◽  
Vol 5 (3) ◽  
pp. 427-439 ◽  
Author(s):  
Chunle Xiong ◽  
Bryn Bell ◽  
Benjamin J. Eggleton
Keyword(s):  
Secure Communication ◽  
Single Photon ◽  
Complementary Metal Oxide Semiconductor ◽  
Building Blocks ◽  
Photonic Devices ◽  
Oxide Semiconductor ◽  
Single Photons ◽  
Quantum Secure Communication ◽  
Cmos Compatible ◽  
Photon Generation

AbstractSources of single photons are one of the key building blocks for quantum photonic technologies such as quantum secure communication and powerful quantum computing. To bring the proof-of-principle demonstration of these technologies from the laboratory to the real world, complementary metal–oxide–semiconductor (CMOS)-compatible photonic chips are highly desirable for photon generation, manipulation, processing and even detection because of their compactness, scalability, robustness, and the potential for integration with electronics. In this paper, we review the development of photonic devices made from materials (e.g., silicon) and processes that are compatible with CMOS fabrication facilities for the generation of single photons.

A Complementary Metal Oxide Semiconductor (CMOS) Compatible Capacitive Silicon Accelerometer with Polysilicon Rib-Style Flexures

1998 ◽  
Vol 37 (Part 1, No. 12B) ◽  
pp. 7093-7099 ◽  
Author(s):  
Seokyu Kim ◽  
Youngjoo Yee ◽  
Hyeoncheol Kim ◽  
Kukjin Chun ◽  
Ikpyo Hong ◽  
...  
Keyword(s):  
Metal Oxide ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Cmos Compatible

Vertical Arrays of Copper Nanotube Grown on Silicon Substrate by CMOS Compatible Electrochemical Process for IC Packaging Applications

2009 ◽  
Vol 6 (3) ◽  
pp. 154-157
Author(s):  
Daniel Choi ◽  
Viola Fucsko ◽  
E. H. Yang ◽  
Jung-Rae Park ◽  
Fahad Khalid ◽  
...  
Keyword(s):  
Thermal Conductivity ◽  
Integrated Circuit ◽  
High Surface ◽  
Complementary Metal Oxide Semiconductor ◽  
Electrochemical Process ◽  
Oxide Semiconductor ◽  
Cu Nanowires ◽  
Vertical Arrays ◽  
Ic Packaging ◽  
Cmos Compatible

We present an electrodeposition-based fabrication process which can be complementary metal oxide semiconductor (CMOS) compatible for creating vertical arrays of copper (Cu) nanotubes for integrated circuit (IC) packaging applications. Since such nanotube structures offer high surface-to-volume ratios, low resistivity, and high thermal conductivity, they are especially suited for IC packaging applications requiring efficient heat transfer as well as electrical interconnect applications. In this work, Cu nanotube arrays were electrodeposited into alumina nanopore templates with pore diameters of approximately 50 nm and 100 nm. Simulation and measurements of the vertical arrays of Cu nanotubes showed greatly enhanced thermal conductivity in the direction of nanotube alignment compared with Cu nanowires and bulk Cu. The thermal conductivity of the vertical arrays of Cu nanotubes at 100°C is about 0.35W/m · K compared to the 0.24 W/m · K from Cu bulk materials, which shows an enhancement of about 146% as a result of the more efficient thermal conduction in Cu nanotubes.

scholarly journals Growth of Ga2O3 Nanowires via Cu-As-Ga Ternary Phase Diagram

Crystals ◽  
2019 ◽  
Vol 9 (3) ◽  
pp. 155 ◽  
Author(s):  
Hang Wang ◽  
Ying Wang ◽  
Shuyan Gong ◽  
Xinyuan Zhou ◽  
Zaixing Yang ◽  
...  
Keyword(s):  
Phase Diagram ◽  
Ternary Phase ◽  
Ternary Phase Diagram ◽  
Chemical Vapor ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Visible Absorption ◽  
Residual Oxygen ◽  
Cmos Compatible

Currently, it is challenging to develop new catalysts for semiconductor nanowires (NWs) growth in a complementary-metal-oxide-semiconductor (CMOS) compatible manner via a vapor-liquid-solid (VLS) mechanism. In this study, chemically synthesized Cu2O nano cubes are adopted as the catalyst for single crystalline β-Ga2O3 NWs growth in chemical vapor deposition. The growth temperature is optimized to be 750 to 800 °C. The NW diameter is controlled by tuning the sizes of Cu2O cubes in the 20 to 100 nm range with a bandgap of ~4.85 eV as measured by ultraviolet-visible absorption spectroscopy. More importantly, the catalyst tip is found to be Cu5As2, which is distinguished from those Au-catalyzed Au-Ga alloys. After a comprehensive phase diagram investigation, the β-Ga2O3 NWs are proposed to be grown by the ternary phase of Cu-As-Ga diffusing Ga into the growth frontier of the NW, where Ga react with residual oxygen to form the NWs. Afterward, Ga diminishes after growth since Ga would be the smallest component in the ternary alloy. All these results show the importance of the catalyst choice for CMOS compatible NW growth and also the potency of the ternary phase catalyst growth mode in other semiconductor NWs synthesis.

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