scholarly journals Quantum Treatment of Inelastic Interactions for the Modeling of Nanowire Field-Effect Transistors

Materials ◽  
2019 ◽  
Vol 13 (1) ◽  
pp. 60 ◽  
Author(s):  
Youseung Lee ◽  
Demetrio Logoteta ◽  
Nicolas Cavassilas ◽  
Michel Lannoo ◽  
Mathieu Luisier ◽  
...  
Keyword(s):  
Inelastic Scattering ◽  
Field Effect ◽  
Phonon Scattering ◽  
Field Effect Transistors ◽  
Order Approximation ◽  
Three Dimensional ◽  
Computational Time ◽  
Thermal Current ◽  
The Impact ◽  
Quantum Treatment

During the last decades, the Nonequilibrium Green’s function (NEGF) formalism has been proposed to develop nano-scaled device-simulation tools since it is especially convenient to deal with open device systems on a quantum-mechanical base and allows the treatment of inelastic scattering. In particular, it is able to account for inelastic effects on the electronic and thermal current, originating from the interactions of electron–phonon and phonon–phonon, respectively. However, the treatment of inelastic mechanisms within the NEGF framework usually relies on a numerically expensive scheme, implementing the self-consistent Born approximation (SCBA). In this article, we review an alternative approach, the so-called Lowest Order Approximation (LOA), which is realized by a rescaling technique and coupled with Padé approximants, to efficiently model inelastic scattering in nanostructures. Its main advantage is to provide a numerically efficient and physically meaningful quantum treatment of scattering processes. This approach is successfully applied to the three-dimensional (3D) atomistic quantum transport OMEN code to study the impact of electron–phonon and anharmonic phonon–phonon scattering in nanowire field-effect transistors. A reduction of the computational time by about ×6 for the electronic current and ×2 for the thermal current calculation is obtained. We also review the possibility to apply the first-order Richardson extrapolation to the Padé N/N − 1 sequence in order to accelerate the convergence of divergent LOA series. More in general, the reviewed approach shows the potentiality to significantly and systematically lighten the computational burden associated to the atomistic quantum simulations of dissipative transport in realistic 3D systems.

Organic Three-dimensional Field-effect Transistors

2008 ◽  
Author(s):  
M. Uno ◽  
I. Doi ◽  
K. Takimiya ◽  
Jun Takeya
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Three Dimensional

scholarly journals Polarization-sensitive photodetectors based on three-dimensional molybdenum disulfide (MoS2) field-effect transistors

Nanophotonics ◽  
2020 ◽  
Vol 9 (16) ◽  
pp. 4719-4728
Author(s):  
Tao Deng ◽  
Shasha Li ◽  
Yuning Li ◽  
Yang Zhang ◽  
Jingye Sun ◽  
...  
Keyword(s):  
Molybdenum Disulfide ◽  
Field Effect ◽  
High Performance ◽  
Field Effect Transistors ◽  
Three Dimensional ◽  
Polarized Light ◽  
Optical Field ◽  
Two Dimensional ◽  
Polarization Ratio ◽  
Two Dimensional Materials

AbstractThe molybdenum disulfide (MoS2)-based photodetectors are facing two challenges: the insensitivity to polarized light and the low photoresponsivity. Herein, three-dimensional (3D) field-effect transistors (FETs) based on monolayer MoS2 were fabricated by applying a self–rolled-up technique. The unique microtubular structure makes 3D MoS2 FETs become polarization sensitive. Moreover, the microtubular structure not only offers a natural resonant microcavity to enhance the optical field inside but also increases the light-MoS2 interaction area, resulting in a higher photoresponsivity. Photoresponsivities as high as 23.8 and 2.9 A/W at 395 and 660 nm, respectively, and a comparable polarization ratio of 1.64 were obtained. The fabrication technique of the 3D MoS2 FET could be transferred to other two-dimensional materials, which is very promising for high-performance polarization-sensitive optical and optoelectronic applications.

scholarly journals Three dimensional band-filling control of complex oxides triggered by interfacial electron transfer

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Meng Meng ◽  
Yuanwei Sun ◽  
Yuehui Li ◽  
Qichang An ◽  
Zhenzhen Wang ◽  
...  
Keyword(s):  
Electron Transfer ◽  
Field Effect ◽  
Essential Role ◽  
Field Effect Transistors ◽  
Three Dimensional ◽  
Complex Oxides ◽  
Band Filling ◽  
Local Lattice ◽  
Oxygen Migration ◽  
Oxide Heterostructure

AbstractThe d-band-filling of transition metals in complex oxides plays an essential role in determining their structural, electronic and magnetic properties. Traditionally, at the oxide heterointerface, band-filling control has been achieved via electrostatic modification in the structure of field-effect transistors or electron transfer, which is limited to the quasi-two-dimension at the interface. Here we report a three-dimensional (3D) band-filling control by changing the local lattice coordination in a designed oxide heterostructure. At the LaCoO3/LaTiO3 heterointerface, due to the Fermi level mismatch, electrons transfer from LaTiO3 to LaCoO3. This triggers destabilisation of the CoO6 octahedrons, i.e. the formation of lattice configurations with a reduced Co valence. The associated oxygen migration results in the 3D topotactic phase transition of LaCoO3. Tuned by the thickness of LaTiO3, different crystalline phases and band-fillings of Co occur, leading to the emergence of different magnetic ground states.

scholarly journals Three-Dimensional Nanoscale Mapping of State-of-the-Art Field-Effect Transistors (FinFETs)

2017 ◽  
Vol 23 (5) ◽  
pp. 916-925
Author(s):  
Pritesh Parikh ◽  
Corey Senowitz ◽  
Don Lyons ◽  
Isabelle Martin ◽  
Ty J. Prosa ◽  
...  
Keyword(s):  
Field Effect ◽  
Focused Ion Beam ◽  
Field Effect Transistors ◽  
Ion Beam ◽  
Semiconductor Industry ◽  
Three Dimensional ◽  
Atom Probe ◽  
Physical Structure ◽  
Oxide Semiconductor ◽  
Device Performance

AbstractThe semiconductor industry has seen tremendous progress over the last few decades with continuous reduction in transistor size to improve device performance. Miniaturization of devices has led to changes in the dopants and dielectric layers incorporated. As the gradual shift from two-dimensional metal-oxide semiconductor field-effect transistor to three-dimensional (3D) field-effect transistors (finFETs) occurred, it has become imperative to understand compositional variability with nanoscale spatial resolution. Compositional changes can affect device performance primarily through fluctuations in threshold voltage and channel current density. Traditional techniques such as scanning electron microscope and focused ion beam no longer provide the required resolution to probe the physical structure and chemical composition of individual fins. Hence advanced multimodal characterization approaches are required to better understand electronic devices. Herein, we report the study of 14 nm commercial finFETs using atom probe tomography (APT) and scanning transmission electron microscopy–energy-dispersive X-ray spectroscopy (STEM-EDS). Complimentary compositional maps were obtained using both techniques with analysis of the gate dielectrics and silicon fin. APT additionally provided 3D information and allowed analysis of the distribution of low atomic number dopant elements (e.g., boron), which are elusive when using STEM-EDS.

scholarly journals Growth of high-quality semiconducting tellurium films for high-performance p-channel field-effect transistors with wafer-scale uniformity

2022 ◽  
Vol 6 (1) ◽  
Author(s):  
Taikyu Kim ◽  
Cheol Hee Choi ◽  
Pilgyu Byeon ◽  
Miso Lee ◽  
Aeran Song ◽  
...  
Keyword(s):  
Field Effect ◽  
Physical Vapor Deposition ◽  
High Performance ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Wafer Scale

AbstractAchieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm2 V−1 s−1 and an ION/OFF ratio of 5.8 × 105 with 4-inch wafer-scale integrity on a SiO2/Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

scholarly journals Numerical Evaluation of the Effect of Geometric Tolerances on the High-Frequency Performance of Graphene Field-Effect Transistors

Nanomaterials ◽  
2021 ◽  
Vol 11 (11) ◽  
pp. 3121
Author(s):  
Monica La Mura ◽  
Patrizia Lamberti ◽  
Vincenzo Tucci
Keyword(s):  
High Frequency ◽  
Communication Systems ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Channel Length ◽  
Geometrical Parameters ◽  
Effect Transistor ◽  
Rf Performance ◽  
The Impact

The interest in graphene-based electronics is due to graphene’s great carrier mobility, atomic thickness, resistance to radiation, and tolerance to extreme temperatures. These characteristics enable the development of extremely miniaturized high-performing electronic devices for next-generation radiofrequency (RF) communication systems. The main building block of graphene-based electronics is the graphene-field effect transistor (GFET). An important issue hindering the diffusion of GFET-based circuits on a commercial level is the repeatability of the fabrication process, which affects the uncertainty of both the device geometry and the graphene quality. Concerning the GFET geometrical parameters, it is well known that the channel length is the main factor that determines the high-frequency limitations of a field-effect transistor, and is therefore the parameter that should be better controlled during the fabrication. Nevertheless, other parameters are affected by a fabrication-related tolerance; to understand to which extent an increase of the accuracy of the GFET layout patterning process steps can improve the performance uniformity, their impact on the GFET performance variability should be considered and compared to that of the channel length. In this work, we assess the impact of the fabrication-related tolerances of GFET-base amplifier geometrical parameters on the RF performance, in terms of the amplifier transit frequency and maximum oscillation frequency, by using a design-of-experiments approach.

High-Mobility SiC MOSFETs with Alkaline Earth Interface Passivation

2016 ◽  
Vol 858 ◽  
pp. 671-676 ◽  
Author(s):  
Daniel J. Lichtenwalner ◽  
Vipindas Pala ◽  
Brett A. Hull ◽  
Scott Allen ◽  
John W. Palmour
Keyword(s):  
Nitric Oxide ◽  
Field Effect ◽  
Alkaline Earth ◽  
Phonon Scattering ◽  
Breakdown Strength ◽  
Field Effect Transistors ◽  
Oxide Semiconductor ◽  
Field Effect Mobility ◽  
Channel Mobility ◽  
Alkaline Earth Elements

Alkaline earth elements Sr and Ba provide SiO2/SiC interface conditions suitable for obtaining high channel mobility metal-oxide-semiconductor field-effect-transistors (MOSFETs) on the Si-face (0001) of 4H-SiC, without the standard nitric oxide (NO) anneal. The alkaline earth elements Sr and Ba located at/near the SiO2/SiC interface result in field-effect mobility (μFE) values as high as 65 and 110 cm2/V.s, respectively, on 5×1015 cm-3 Al-doped p-type SiC. As the SiC doping increases, peak mobility decreases as expected, but the peak mobility remains higher for Ba interface layer (Ba IL) devices compared to NO annealed devices. The Ba IL MOSFET field-effect mobility decreases as the temperature is increased to 150 °C, as expected when mobility is phonon-scattering-limited, not interface-trap-limited. This is in agreement with measurements of the interface state density (DIT) using the high-low C-V technique, indicating that the Ba IL results in lower DIT than that of samples with nitric oxide passivation. Vertical power MOSFET (DMOSFET) devices (1200V, 15A) fabricated with the Ba IL have a 15% lower on-resistance compared to devices with NO passivation. The DMOSFET devices with a Ba IL maintain a stable threshold voltage under NBTI stress conditions of-15V gate bias stress, at 150 °C for 100hrs, indicating no mobile ions. Secondary-ion mass-spectrometry (SIMS) analysis confirms that the Sr and Ba remain predominantly at the SiO2/SiC interface, even after high temperature oxide annealing, consistent with the observed high channel mobility after these anneals. The alkaline earth elements result in enhanced SiC oxidation rate, and the resulting gate oxide breakdown strength is slightly reduced compared to NO annealed thermal oxides on SiC.

Insight into Channel Conduction Mechanisms of 4H-SiC(0001) MOSFET Based on Temperature-Dependent Hall Effect Measurement

2020 ◽  
Vol 1004 ◽  
pp. 620-626
Author(s):  
Hironori Takeda ◽  
Mitsuru Sometani ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Hiroshi Yano ◽  
...  
Keyword(s):  
Hall Effect ◽  
Field Effect ◽  
Elevated Temperatures ◽  
Field Effect Transistors ◽  
Free Carrier ◽  
Oxide Semiconductor ◽  
Thermal Excitation ◽  
Temperature Dependent ◽  
Conduction Mechanisms ◽  
The Impact

Temperature-dependent Hall effect measurements were conducted to investigate the channel conduction mechanisms of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). This method allows us to discriminate the impact of the density of mobile (free) carriers in the inversion channels and their net mobility on the performance of SiC MOSFETs. It was found that, while the free carrier ratio of SiC MOSFETs with conventional gate oxides formed by dry oxidation is below 4% at 300 K, increasing the free carrier ratio due to thermal excitation of trapped electrons from SiO2/SiC interfaces leads to an unusual improvement in the field-effect mobility of SiC MOSFETs at elevated temperatures. Specifically, a significant increase in free carrier density surpasses the mobility degradation caused by phonon scattering for thermally grown SiO2/SiC interfaces. It was also found that, although nitrogen incorporation in SiO2/SiC interfaces increases the free carrier ratio typically up to around 30%, introduction of an additional scattering factor associated with interface nitridation compensates for the moderate amount of thermally generated mobile carriers at high temperatures, indicating a fundamental drawback of nitridation of SiO2/SiC interfaces. On the basis of these findings, we discuss the channel conduction mechanisms of SiC MOSFETs.

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