scholarly journals A Solar-Powered IoT Connected Physical Mailbox Interfaced with Smart Devices

IoT ◽  
2020 ◽  
Vol 1 (1) ◽  
pp. 128-144
Author(s):  
Tareq Khan
Keyword(s):  
Electronic Communication ◽  
System On Chip ◽  
Low Energy ◽  
Power Device ◽  
Smart Devices ◽  
Rechargeable Battery ◽  
Smartphone App ◽  
The Status ◽  
Solar Powered ◽  
On Chip

In this age of electronic communication, checking the physical mailbox is still part of our daily life. Mailboxes are placed several meters away from the house, and sometimes across the opposite side of a street. It is annoying to walk to the mailbox each day and realize that the mailbox is empty. In this paper, an Internet of Things (IoT)-connected smart mailbox is developed that automatically sends a notification to the smartphone whenever new mail arrives. This notification removes the frustration of an unnecessary trip to the mailbox. The proposed mailbox contains a low power device comprising of sensors, a system-on-chip microcontroller with Bluetooth Low Energy (BLE), and a rechargeable battery that charges with a solar panel. Whenever the mailbox door is closed, it checks the presence of mail and then sends the data to a hub using BLE. The hub is placed inside the house and sends a push notification to the smartphone using the home Wi-Fi. A smart speaker, Google Home, is also interfaced with the system, which can verbally say the status of the mailbox when asked a customized question. A prototype of the smart mailbox, the hub, and the smartphone app is developed and tested successfully.

A 260µW infrared gesture recognition system-on-chip for smart devices

2016 ◽  
Author(s):  
Sechang Oh ◽  
Ngoc Le Ba ◽  
Suyoung Bang ◽  
Junwon Jeong ◽  
David Blaauw ◽  
...  
Keyword(s):  
Gesture Recognition ◽  
Recognition System ◽  
System On Chip ◽  
Smart Devices ◽  
On Chip

Qualitative techniques for System-on-Chip test with low-energy protons

2016 ◽  
Author(s):  
Stefano Di Mascio ◽  
Marco Ottavi ◽  
Gianluca Furano ◽  
Tomasz Szewczyk ◽  
Alessandra Menicucci ◽  
...  
Keyword(s):  
System On Chip ◽  
Low Energy ◽  
On Chip

Single event effects sensitivity of low energy proton in Xilinx Zynq-7010 system-on chip

2017 ◽  
Vol 71 ◽  
pp. 65-70 ◽  
Author(s):  
Xuecheng Du ◽  
Shuhuan Liu ◽  
Dongyang Luo ◽  
Yao Zhang ◽  
Xiaozhi Du ◽  
...  
Keyword(s):  
System On Chip ◽  
Low Energy ◽  
Single Event ◽  
Single Event Effects ◽  
Energy Proton ◽  
On Chip

Multiprocessor transport surveillance video system based on "system on chip" technology

2020 ◽  
Author(s):  
Ш.С. Фахми ◽  
Н.В. Шаталова ◽  
В.В. Вислогузов ◽  
Е.В. Костикова
Keyword(s):  
System On Chip ◽  
Reference Points ◽  
Surveillance Video ◽  
Video Information ◽  
Chip Technology ◽  
Intelligent Video Surveillance System ◽  
Speed Up ◽  
Algorithmic Analysis ◽  
Computational Procedures ◽  
On Chip

В данной работе предлагаются математический аппарат и архитектура многопроцессорной транспортной системы на кристалле (МПТСнК). Выполнена программно-аппаратная реализация интеллектуальной системы видеонаблюдения на базе технологии «система на кристалле» и с использованием аппаратного ускорителя известного метода формирования опорных векторов. Архитектура включает в себя сложно-функциональные блоки анализа видеоинформации на базе параллельных алгоритмов нахождения опорных точек изображений и множества элементарных процессоров для выполнения сложных вычислительных процедур алгоритмов анализа с использованием средств проектирования на базе реконфигурируемой системы на кристалле, позволяющей оценить количество аппаратных ресурсов. Предлагаемая архитектура МПТСнК позволяет ускорить обработку и анализ видеоинформации при решении задач обнаружения и распознавания чрезвычайных ситуаций и подозрительных поведений. In this paper, we propose the mathematical apparatus and architecture of a multiprocessor transport system on a chip (MPTSoC). Software and hardware implementation of an intelligent video surveillance system based on the "system on chip" technology and using a hardware accelerator of the well-known method of forming reference vectors. The architecture includes complex functional blocks for analyzing video information based on parallel algorithms for finding image reference points and a set of elementary processors for performing complex computational procedures for algorithmic analysis. using design tools based on a reconfigurable system on chip that allows you to estimate the amount of hardware resources. The proposed MPTSoC architecture makes it possible to speed up the processing and analysis of video information when solving problems of detecting and recognizing emergencies and suspicious behaviors

ОСОБЕННОСТИ АРХИТЕКТУРЫ И ОСНОВНЫЕ ХАРАКТЕРИСТИКИ АППАРАТНОГО ВИДЕОКОДЕКА СТАНДАРТА H.264 В СОСТАВЕ МИКРОСХЕМЫ 1892ВМ14Я

2020 ◽  
Vol 96 (3s) ◽  
pp. 89-96
Author(s):  
А.А. Беляев ◽  
Я.Я. Петричкович ◽  
Т.В. Солохина ◽  
И.А. Беляев
Keyword(s):  
Data Flow ◽  
System On Chip ◽  
Video Codec ◽  
Experimental Results ◽  
Video Sequences ◽  
Ip Core ◽  
Performance Measurements ◽  
Synchronization Mechanism ◽  
Architectural Features ◽  
On Chip

Рассмотрены особенности архитектуры и основные характеристики аппаратного видеокодека по стандарту H.264, входящего в состав микросхемы 1892ВМ14Я (MCom-02). Описан механизм синхронизации потоков данных на основе набора флагов событий. Приведены экспериментальные результаты измерения характеристик производительности разработанного видеокодека на реальных видеосюжетах при различных форматах передаваемого изображения. The paper considers main architectural features and characteristics of H.264 hardware video codec IP-core as a part of MCom- 02 system-on-chip (SoC). Bedides, it presents data flow synchronization mechanism based on event flags set, as well as experimental results of performance measurements for the designed video codec IP-core obtained for different video sequences and different image formats.

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