scholarly journals Research on the Equivalent Virtual Space Vector Modulation Output of Diode Clamped N-level Converter under Multi-Modulation Carrier Modulation

Energies ◽  
2020 ◽  
Vol 13 (15) ◽  
pp. 3803
Author(s):  
Yingjie He ◽  
Chao Lei ◽  
Yunfeng Liu ◽  
Jinjun Liu

Diode-clamped multi-level converters have DC-side capacitors in series, which will lead to the unbalance of DC-side capacitor voltage, the distortion of the output waveform, the increase of total harmonic distortion (THD), and even the damage of switching devices, which will make the system inoperable. The proposal of virtual space vector pulse-width modulation (VSVPWM) realizes the balanced control of the capacitor voltage, but when the output level of converter increases, the implementation of VSVPWM becomes very complicated, and the amount of calculation also increases greatly, thus hindering its application in the multi-level circuit. Compared with VSVPWM, the carrier-based pulse-width modulation (CBPWM) is simple to operate and easy to implement. If the equivalent relationship between CBPWM and VSVPWM can be found, the application of VSVPWM can be generalized to any level, and the advantages of VSVPWM can be fully utilized. This paper aims to study the inner relationship of VSVPWM and the multi-modulation carrier CBPWM (MCBPWM). After strict theoretical analysis, the equivalent relationship of VSVPWM and MCBPWM in the three-level and four-level and converter is realized by injecting the zero-sequence component into the modulation waves. Furthermore, the equivalent relationship between VSVPWM and MCBPWM is deduced to the N-level converter. Finally, the correctness of the relevant theoretical analysis is verified by the experiment.

Energies ◽  
2020 ◽  
Vol 13 (9) ◽  
pp. 2143
Author(s):  
Chen Wei ◽  
Xibo Yuan ◽  
Yonglei Zhang ◽  
Xiaojie Wu

Multi-level converters are widely used in various industrial applications. Among various space vector modulation (SVM) schemes, the multi-level SVM scheme based on two-level space vector pulse width modulation (SVPWM) is recognised as a simplified multi-level SVM scheme, which can reduce the computation complexity. However, this scheme is still complicated when the number of the voltage levels is large. This paper proposes a modified SVM scheme that can further simplify the multi-level SVM scheme based on two-level SVPWM. The proposed SVM scheme can directly determine the two-level hexagon where the reference voltage vector is located by calculating a simple formula. The whole modulation process can be completed by only three steps. Meanwhile, the proposed method is generic for any n-level converter without adding much calculation, which greatly simplifies the modulation process. Experimental results have been provided, which verify the effectiveness and generality of the proposed SVM scheme for two types of multi-level converters.


This paper deals with sensorless vector controlled induction motor in which torque pulsations are reduced with improved input of induction motor. In proposed technique two multi winding transformers are used for generation of 18 sinusoidal signals given to rectifier unit and the rectifier output given as input to 9 level multi level inverter. In this proposed technique gating signals to the inverter switches will be provided through space vector pulse width modulation which considers speed as reference. This configuration was simulated in MATLAB/Simulink.and the simulation results are presented here with improvement in reduction of THD.


2021 ◽  
Vol 2021 ◽  
pp. 1-19
Author(s):  
Nam Xuan Doan ◽  
Nho Van Nguyen

This paper proposes a novel 3-phase asymmetric 3-level T-type NPC inverter and studies its PWM performance using a virtual space vector pulse width modulation control strategy. Firstly, the mathematical model and characteristics of this economical topology are described. Then, a virtual space vector approach is proposed to build a space vector diagram for designing SVPWM control. Similar to the conventional 3-level NPC inverter, the asymmetric inverter can also work with the neutral point voltage self-balancing in a fundamental period, which enables employment of this topology in various applications. Finally, simulation and experiment results under different load conditions have shown good output performance of the asymmetric 3-level topology. Similar tests are also performed on both conventional 2-level and 3-level inverters for comparison. For an almost similar number of different voltage vectors in the space vector diagram, the asymmetric 3-level topology can compete with conventional 3-level inverters for low-cost applications. The obvious benefit of the asymmetric 3-level inverter is a smaller number of switches devices while it can achieve output performance similar to that of the conventional 3-level. The comparative investigation also shows that the total loss given by SVPWM for the asymmetric 3-level configuration is lower than that of the traditional 3-level inverter.


2014 ◽  
Vol 556-562 ◽  
pp. 1939-1944
Author(s):  
Zuo Ming Liu ◽  
Zi Qiang Xi ◽  
Chen Guang Yu

First of all, this paper speculates that the essence of the space vector pulse width modulation (SVPWM) is the injection of some kind of zero sequence component through the theoretical analysis. Increasing the range of output voltage and reducing the switching loss are the optimization it can realize, the essential realization method is implemented by changing the placement of zero space vector. Then the method is applied to the cascade multilevel carrier modulation. The main work of this paper is to analyze the relation between SVPWM and the carrier PWM in the two level converter, then add the discrete modulation into the cascade multilevel carrier modulation to verify that the space vector modulation can be realized in cascade multilevel and can get similar results with the two level.


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