scholarly journals Power-Efficient Driver Circuit for Piezo Electric Actuator with Passive Charge Recovery

Energies ◽  
2020 ◽  
Vol 13 (11) ◽  
pp. 2866 ◽  
Author(s):  
Takashi Ozaki ◽  
Norikazu Ohta

Piezoelectric actuation is a promising principle for insect-scaled robots. A major concern while utilizing a piezoelectric actuator is energy loss due to its parasitic capacitance. In this paper, we propose a new concept to recover the charge stored in the parasitic capacitance; it requires only three additional lightweight passive components: two diodes and a resistor. The advantages of our concept are its small additional mass and simple operating procedure compared with existing charge recovery circuits. We provided a guideline for selecting a resistor using a simplified theoretical model and found that half of the charge can be recovered by employing a resistor that has a resistance sufficiently larger than the forward resistance of the additional diode. In addition, we experimentally demonstrated the concept. With a capacitive load (as a replacement for the piezoelectric actuator), it was successfully observed that the proposed concept decreased the power consumption to 58% of that in a circuit without charge recovery. Considering micro aerial vehicle (MAV) applications, we measured the lift-to-power efficiency of a flapping wing piezoelectric actuator by applying the proposed concept. The lift force was not affected by charge recovery; however, the power consumption was reduced. As a result, the efficiency was improved to 30.0%. We expect that the proposed circuit will contribute to the advancement of energy-saving microrobotics.

Author(s):  
G. Biancuzzi ◽  
T. Lemke ◽  
F. Goldschmidtboeing ◽  
O. Ruthmann ◽  
H.-J. Schrag ◽  
...  

The German Artificial Sphincter System (GASS) project aims at the development of an implantable sphincter prosthesis driven by a micropump. During the last few years the feasibility of the concept has been proven. At present our team’s effort is focused on the compliance to safety regulations and on a very low power consumption of the system as a whole. Therefore a low-voltage multilayer piezoactuator has been developed to reduce the driving voltage of the micropump from approximately 300 Vpp to 40 Vpp. Doing so, the driving voltage is within the limits set by the regulations for active implants. The operation of the micropump at lower voltages, achieved using multilayer piezoactuators, has already resulted in a much better power efficiency. Nevertheless, in order to further reduce power consumption, we have also developed an innovative driving technique that we are going to describe and compare to other driving systems. A direct switching circuit has been developed where the buffer capacitor of the step-up converter has been replaced by the equivalent capacitance of the actuator itself. This avoids the switching of the buffer capacitor to the actuator, which would result in a very low efficiency. Usually, a piezoactuator needs a bipolar voltage drive to achieve maximum displacement. In our concept, the voltage inversion across the actuator is done using an h-bridge circuit, allowing the employment of one step-up converter only. The charge stored in the actuator is then partially recovered by means of a step-down converter which stores back the energy at the battery voltage level. The power consumption measurements of our concept are compared to a conventional driving output stage and also with inductive charge recovery circuits. In particular, the main advantage, compared to the latter systems, consists in the small inductors needed for the power converter. Other charge recovery techniques require very big inductors in order to have a significant power reduction with the capacitive loads we use in our application. With our design we will be able to achieve approximately 55% reduction in power consumption compared to the simplest conventional driver and 15% reduction compared to a charge recovery driver.


Nanophotonics ◽  
2020 ◽  
Vol 10 (2) ◽  
pp. 937-945
Author(s):  
Ruihuan Zhang ◽  
Yu He ◽  
Yong Zhang ◽  
Shaohua An ◽  
Qingming Zhu ◽  
...  

AbstractUltracompact and low-power-consumption optical switches are desired for high-performance telecommunication networks and data centers. Here, we demonstrate an on-chip power-efficient 2 × 2 thermo-optic switch unit by using a suspended photonic crystal nanobeam structure. A submilliwatt switching power of 0.15 mW is obtained with a tuning efficiency of 7.71 nm/mW in a compact footprint of 60 μm × 16 μm. The bandwidth of the switch is properly designed for a four-level pulse amplitude modulation signal with a 124 Gb/s raw data rate. To the best of our knowledge, the proposed switch is the most power-efficient resonator-based thermo-optic switch unit with the highest tuning efficiency and data ever reported.


Sensors ◽  
2021 ◽  
Vol 21 (6) ◽  
pp. 1936
Author(s):  
Tsun-Kuang Chi ◽  
Hsiao-Chi Chen ◽  
Shih-Lun Chen ◽  
Patricia Angela R. Abu

In this paper, a novel self-optimizing water level monitoring methodology is proposed for smart city applications. Considering system maintenance, the efficiency of power consumption and accuracy will be important for Internet of Things (IoT) devices and systems. A multi-step measurement mechanism and power self-charging process are proposed in this study for improving the efficiency of a device for water level monitoring applications. The proposed methodology improved accuracy by 0.16–0.39% by moving the sensor to estimate the distance relative to different locations. Additional power is generated by executing a multi-step measurement while the power self-optimizing process used dynamically adjusts the settings to balance the current of charging and discharging. The battery level can efficiently go over 50% in a stable charging simulation. These methodologies were successfully implemented using an embedded control device, an ultrasonic sensor module, a LORA transmission module, and a stepper motor. According to the experimental results, the proposed multi-step methodology has the benefits of high accuracy and efficient power consumption for water level monitoring applications.


2020 ◽  
Vol 164 ◽  
pp. 107683 ◽  
Author(s):  
Hui Peng ◽  
Herbert De Pauw ◽  
Pieter Bauwens ◽  
Jan Doutreloigne

2015 ◽  
Vol 643 ◽  
pp. 109-116
Author(s):  
Daiki Oki ◽  
Satoru Kawauchi ◽  
Cong Bing Li ◽  
Masataka Kamiyama ◽  
Seiichi Banba ◽  
...  

This paper presents a power-efficient noise-canceling technique based on the feed-forward amplifiers, considering a fundamental tradeoff between noise figure (NF) and power consumption in the design of wide-band amplifiers. By suppressing the input signal of the noise cancellation amplifier, the nonlinear effect on the amplifier can be reduced, as well as the power consumption can be smaller. Furthermore, as a lower gain of the noise-canceling sub-amplifier can be achieved simultaneously, further reduction of the power consumption becomes possible. The verification of the proposed technique is conducted with Spectre simulation using 90nm CMOS process.


2020 ◽  
Vol 10 (21) ◽  
pp. 7583
Author(s):  
Kun-Mo Lin ◽  
Kai-Cheng Wang ◽  
Yao-Sheng Chang ◽  
Shun-Yu Chuang

The present work investigates contributions of different heating mechanisms and power efficiency of atmospheric-pressure helium dielectric-barrier discharges (APHeDBDs) containing a small amount of N2 for temperature measurements by developing the numerical methodology combining the one-dimensional (1D) plasma fluid model (PFM) and 3D gas flow model (GFM) with simulated results validated by measurements including the discharge power consumption and temperature distribution. The discharge dynamics are modeled by the 1D PFM for evaluating the average heating source considering elastic collision, ion Joule heating, and exothermic reactions as the source term of energy equation solved in the 3D GFM. The simulated current density reaches 29 A m−2 which is close to that measured as 35 A m−2. The simulated power consumption is 2.0 W which is in good agreement with the average measured power consumption as 2.1 W. The simulated average gas temperature in the reactive zone is around 346 K which is also close to the rotational temperature determined. The analysis shows that elastic collision and ion Joule heating are dominant heating mechanisms contributing 23.9% and 65.8% to the heating source, respectively. Among ion species, N2+ and N4+ are dominant species contributing 44.1% and 50.7% to the heating source of ion Joule heating, respectively. The simulated average total heating source is around 5.6 × 105 W m−3 with the maximum reaching 3.5 × 106 W m−3 in the sheath region due to the contribution of ion Joule heating.


2013 ◽  
Vol 9 (3) ◽  
pp. 241-260 ◽  
Author(s):  
Fuu-Cheng Jiang ◽  
Hsiang-Wei Wu ◽  
Fang-Yi Leu ◽  
Chao-Tung Yang

Power efficiency is a crucially important issue in the IEEE 802.15.4/ZigBee sensor networks (ZSNs) for majority of sensor nodes equipped with non-rechargeable batteries. To increase the lifetime of sensor networks, each node must optimize power consumption as possible. Among open literatures, much research works have focused on how to optimally increase the probability of sleeping states using multifarious wake-up strategies. Making things different, in this article, we propose a novel optimization framework for alleviating power consumption of sensor node with the D-policy M/G/1 queuing approach. Toward green sensor field, the proposed power-saving technique can be applied to prolong the lifetime of ZSN economically and effectively. For the proposed data aggregation model, mathematical framework on performance measures has been formulated. Data simulation using MATLAB tool has been conducted for exploring the feasibility of the proposed approach. And also we analyze the average traffic load per node for tree-based ZSN. Focusing on ZigBee routers deployed at the innermost shell of ZSN, network simulation results validate that the proposed approach indeed provides a feasibly cost-effective approach for prolonging lifetime of ZSNs.


Arithmetic Logic Unit (ALU) is the main component in the processors. Most important design consideration in integrated circuit is power. In all the components of ALU data path is the active one and it consumes more percent of power in the total power. In the modern microprocessors it is important to have power efficient data paths. To reduce the power consumption in microprocessors the ALU is designed using PNS-FCR static CMOS logic. In this paper static CMOS logic is used to reduce power consumption. Static technique does not need any clock. So it leads to less power consumption. For the implementation of the ALU with the PNS-FCR static logic mentor graphics tool is used. The power consumption of ALU is compared with and without using FCR. An 8-bit ALU is designed in mentor graphics with 130nm technology. The proposed design methodology gives less power consumption


Author(s):  
Sheng Kang ◽  
Guofeng Chen ◽  
Chun Wang ◽  
Ruiquan Ding ◽  
Jiajun Zhang ◽  
...  

With the advent of big data and cloud computing solutions, enterprise demand for servers is increasing. There is especially high growth for Intel based x86 server platforms. Today’s datacenters are in constant pursuit of high performance/high availability computing solutions coupled with low power consumption and low heat generation and the ability to manage all of this through advanced telemetry data gathering. This paper showcases one such solution of an updated rack and server architecture that promises such improvements. The ability to manage server and data center power consumption and cooling more completely is critical in effectively managing datacenter costs and reducing the PUE in the data center. Traditional Intel based 1U and 2U form factor servers have existed in the data center for decades. These general purpose x86 server designs by the major OEM’s are, for all practical purposes, very similar in their power consumption and thermal output. Power supplies and thermal designs for server in the past have not been optimized for high efficiency. In addition, IT managers need to know more information about servers in order to optimize data center cooling and power use, an improved server/rack design needs to be built to take advantage of more efficient power supplies or PDU’s and more efficient means of cooling server compute resources than from traditional internal server fans. This is the constant pursuit of corporations looking at new ways to improving efficiency and gaining a competitive advantage. A new way to optimize power consumption and improve cooling is a complete redesign of the traditional server rack. Extracting internal server power supplies and server fans and centralizing these within the rack aims to achieve this goal. This type of design achieves an entirely new low power target by utilizing centralized, high efficiency PDU’s that power all servers within the rack. Cooling is improved by also utilizing large efficient rack based fans for airflow to all servers. Also, opening up the server design is to allow greater airflow across server components for improved cooling. This centralized power supply breaks through the traditional server power limits. Rack based PDU’s can adjust the power efficiency to a more optimum point. Combine this with the use of online + offline modes within one single power supply. Cold backup makes data center power to achieve optimal power efficiency. In addition, unifying the mechanical structure and thermal definitions within the rack solution for server cooling and PSU information allows IT to collect all server power and thermal information centrally for improved ease in analyzing and processing.


Author(s):  
Maytham Safar ◽  
Hasan Al-Hamadi ◽  
Dariush Ebrahimi

Wireless sensor networks (WSN) have emerged in many applications as a platform to collect data and monitor a specified area with minimal human intervention. The initial deployment of WSN sensors forms a network that consists of randomly distributed devices/nodes in a known space. Advancements have been made in low-power micro-electronic circuits, which have allowed WSN to be a feasible platform for many applications. However, there are two major concerns that govern the efficiency, availability, and functionality of the network—power consumption and fault tolerance. This paper introduces a new algorithm called Power Efficient Cluster Algorithm (PECA). The proposed algorithm reduces the power consumption required to setup the network. This is accomplished by effectively reducing the total number of radio transmission required in the network setup (deployment) phase. As a fault tolerance approach, the algorithm stores information about each node for easier recovery of the network should any node fail. The proposed algorithm is compared with the Self Organizing Sensor (SOS) algorithm; results show that PECA consumes significantly less power than SOS.


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