scholarly journals Full-Bridge Active-Clamp Forward-Flyback Converter with an Integrated Transformer for High-Performance and Low Cost Low-Voltage DC Converter of Vehicle Applications

Energies ◽  
2020 ◽  
Vol 13 (4) ◽  
pp. 863 ◽  
Author(s):  
Jaeil Baek ◽  
Han-Shin Youn
Keyword(s):  
High Power ◽  
High Performance ◽  
Low Voltage ◽  
Low Cost ◽  
Primary Root ◽  
Input Voltage ◽  
Oxide Semiconductor ◽  
Duty Ratio ◽  
Voltage Range ◽  
Active Clamp

This paper presents a full-bridge active-clamp forward-flyback (FBACFF) converter with an integrated transformer sharing a single primary winding. Compared to the conventional active-clamp-forward (ACF) converter, the proposed converter has low voltage stress on the primary switches due to its full-bridge active-clamp structure, which can leverage high performance Silicon- metal–oxide–semiconductor field-effect transistor (Si-MOSFET) of low voltage rating and low channel resistance. Integrating forward and flyback operations allows the proposed converter to have much lower primary root mean square (RMS) current than the conventional phase-shifted-full-bridge (PSFB) converter, while covering wide input/output voltage range with duty ratio over 0.5. The proposed integrated transformer reduces the transformer conduction loss and simplify the secondary structure of the proposed converter. As a result, the proposed converter has several advantages: (1) high heavy load efficiency, (2) wide input voltage range operation, (3) high power density with the integrated transformer, and (4) low cost. The proposed converter is a very promising candidate for applications with wide input voltage range and high power, such as the low-voltage DC (LDC) converter for eco-friendly vehicles.

scholarly journals High-Power Multimodular Matrix Converters and Modulation

2021 ◽  
Author(s):  
Jiacheng Wang
Keyword(s):  
High Power ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Input Voltage ◽  
Duty Ratio ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Space Vector ◽  
Phase Switching ◽  
Matrix Converters

High-power multimodular matrix converters (MMMCs) comprising multiple threephase to single-phase matrix converter modules have emerged as a viable topology candidate for medium-voltage adjustable speed drives. As a combination of direct power conversion and cascaded multilevel structure, the MMMCs inherit features such as elimination of dc capacitors, four quadrant operation capability, employment of lowvoltage devices only, and superior output waveform quality under a limited device switching frequency. Due to their particular topological structure, modulation scheme design for the MMMCs is not straightforward and complicated. The presented work is mainly focused on development of suitable modulation schemes for the MMMCs. Several viable schemes as well as their corresponding switching patterns are proposed and verified by both simulation and experimental results. In order for the MMMCs to produce sinusoidal waveforms at both input and output ac terminals, a direct transfer matrix based modulation scheme is presented. It is revealed that a suitable modulation strategy for the MMMCs should aim at fabricating the total input current on the primary side of the isolation transformer. For topologies with more than two modules in cascade on each output phase, switching period displacement is necessary among modules to generate multilevel output waveforms. An indirect space vector based modulation scheme for the MMMCs is developed. With a few presumptions satisfied and viewed from a certain perspective, the MMMCs can still be modeled indirectly and be divided into fictitious rectifier and inverter stages. Therefore, space vector modulation methods can be independently applied to both stages for duty ratio calculation, before the results are converted and combined for determining per-phase output pulses. A new output switching pattern providing improved harmonic performance is also proposed. A novel modulation scheme based on diode rectifier emulation and phase-shifted sinusoidal pulse-width modulation is proposed. The method sacrifices input power factor adjustment, but enables the use of an indirect module construction leading to significantly reduced device count and complexity. Strategy for reducing additional switchings caused by input voltage ripples is also implemented and explained. In addition to simulation verifications, all the proposed schemes are further tested experimentally on a low-voltage prototype built in the lab. Details about the prototype implementation are introduced.

scholarly journals High-Power Multimodular Matrix Converters and Modulation

2021 ◽  
Author(s):  
Jiacheng Wang
Keyword(s):  
High Power ◽  
Pulse Width Modulation ◽  
Low Voltage ◽  
Input Voltage ◽  
Duty Ratio ◽  
Modulation Scheme ◽  
Switching Frequency ◽  
Space Vector ◽  
Phase Switching ◽  
Matrix Converters

High-power multimodular matrix converters (MMMCs) comprising multiple threephase to single-phase matrix converter modules have emerged as a viable topology candidate for medium-voltage adjustable speed drives. As a combination of direct power conversion and cascaded multilevel structure, the MMMCs inherit features such as elimination of dc capacitors, four quadrant operation capability, employment of lowvoltage devices only, and superior output waveform quality under a limited device switching frequency. Due to their particular topological structure, modulation scheme design for the MMMCs is not straightforward and complicated. The presented work is mainly focused on development of suitable modulation schemes for the MMMCs. Several viable schemes as well as their corresponding switching patterns are proposed and verified by both simulation and experimental results. In order for the MMMCs to produce sinusoidal waveforms at both input and output ac terminals, a direct transfer matrix based modulation scheme is presented. It is revealed that a suitable modulation strategy for the MMMCs should aim at fabricating the total input current on the primary side of the isolation transformer. For topologies with more than two modules in cascade on each output phase, switching period displacement is necessary among modules to generate multilevel output waveforms. An indirect space vector based modulation scheme for the MMMCs is developed. With a few presumptions satisfied and viewed from a certain perspective, the MMMCs can still be modeled indirectly and be divided into fictitious rectifier and inverter stages. Therefore, space vector modulation methods can be independently applied to both stages for duty ratio calculation, before the results are converted and combined for determining per-phase output pulses. A new output switching pattern providing improved harmonic performance is also proposed. A novel modulation scheme based on diode rectifier emulation and phase-shifted sinusoidal pulse-width modulation is proposed. The method sacrifices input power factor adjustment, but enables the use of an indirect module construction leading to significantly reduced device count and complexity. Strategy for reducing additional switchings caused by input voltage ripples is also implemented and explained. In addition to simulation verifications, all the proposed schemes are further tested experimentally on a low-voltage prototype built in the lab. Details about the prototype implementation are introduced.

Design Technique of High Power Efficiency LLC DC-DC Converters for Photovoltaic Cells

2018 ◽  
Vol 2 (1) ◽  
pp. 30
Author(s):  
Hisatsugu Kato ◽  
Yoichi Ishizuka ◽  
Kohei Ueda ◽  
Shotaro Karasuyama ◽  
Atsushi Ogasahara
Keyword(s):  
High Power ◽  
Power Efficiency ◽  
Photovoltaic Cells ◽  
Input Voltage ◽  
Design Technique ◽  
Load Range ◽  
Voltage Range ◽  
Simulation Results ◽  
Secondary Side ◽  
High Power Efficiency

This paper proposes a design technique of high power efficiency LLC DC-DC Converters for Photovoltaic Cells. The secondary side circuit and transformer fabrication of proposed circuit are optimized for overcoming the disadvantage of limited input voltage range and, realizing high power efficiency over a wide load range of LLC DC-DC converters. The optimized technique is described with theoretically and with simulation results. Some experimental results have been obtained with the prototype circuit designed for the 80 - 400 V input voltage range. The maximum power efficiency is 98 %.

scholarly journals Design of a Low-Noise, Fast Set-up and Low-Voltage Low-Dropout Regulator Featuring 230mA Load Current Range

2021 ◽  
Author(s):  
Darshil Patel
Keyword(s):  
Low Voltage ◽  
Input Voltage ◽  
Low Noise ◽  
Cmos Process ◽  
Transient Time ◽  
Voltage Range ◽  
Fast Transient ◽  
Low Dropout Regulator ◽  
Set Up ◽  
Ldo Regulator

Low noise, high PSRR and fast transient low-dropout (LDO) regulators are critical for analog blocks such as ADCs, PLLs and RF SOC, etc. This paper presents design of low power, fast transient, high PSRR and high load-regulation low-dropout (LDO) regulator. The proposed LDO regulator is designed in 180nm. CMOS process and simulated in LTSpice and Cadence platform. The LDO proposed can support input voltage range up to 5V for loading currents up to 230mA. Measurements showed transient time or set-up time of less than 22µs, PSRR of ~66dB at 100kHz and >40dB at 1MHz and 0.8535mV of output voltage variation for a 0-230mA of load variation.

scholarly journals Growth of high-quality semiconducting tellurium films for high-performance p-channel field-effect transistors with wafer-scale uniformity

2022 ◽  
Vol 6 (1) ◽  
Author(s):  
Taikyu Kim ◽  
Cheol Hee Choi ◽  
Pilgyu Byeon ◽  
Miso Lee ◽  
Aeran Song ◽  
...  
Keyword(s):  
Field Effect ◽  
Physical Vapor Deposition ◽  
High Performance ◽  
Supply Voltage ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Three Dimensional ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Wafer Scale

AbstractAchieving high-performance p-type semiconductors has been considered one of the most challenging tasks for three-dimensional vertically integrated nanoelectronics. Although many candidates have been presented to date, the facile and scalable realization of high-mobility p-channel field-effect transistors (FETs) is still elusive. Here, we report a high-performance p-channel tellurium (Te) FET fabricated through physical vapor deposition at room temperature. A growth route involving Te deposition by sputtering, oxidation and subsequent reduction to an elemental Te film through alumina encapsulation allows the resulting p-channel FET to exhibit a high field-effect mobility of 30.9 cm2 V−1 s−1 and an ION/OFF ratio of 5.8 × 105 with 4-inch wafer-scale integrity on a SiO2/Si substrate. Complementary metal-oxide semiconductor (CMOS) inverters using In-Ga-Zn-O and 4-nm-thick Te channels show a remarkably high gain of ~75.2 and great noise margins at small supply voltage of 3 V. We believe that this low-cost and high-performance Te layer can pave the way for future CMOS technology enabling monolithic three-dimensional integration.

scholarly journals Process Design Kit and Design Automation for Flexible Hybrid Electronics

2019 ◽  
Vol 16 (3) ◽  
pp. 117-123
Author(s):  
Tsung-Ching Huang ◽  
Ting Lei ◽  
Leilai Shao ◽  
Sridhar Sivapurapu ◽  
Madhavan Swaminathan ◽  
...  
Keyword(s):  
Process Design ◽  
Design Automation ◽  
High Performance ◽  
Large Scale ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Solution Process ◽  
Oxide Semiconductor ◽  
Wearable Electronics ◽  
Wide Range

Abstract High-performance low-cost flexible hybrid electronics (FHE) are desirable for applications such as internet of things and wearable electronics. Carbon nanotube (CNT) thin-film transistor (TFT) is a promising candidate for high-performance FHE because of its high carrier mobility, superior mechanical flexibility, and material compatibility with low-cost printing and solution processes. Flexible sensors and peripheral CNT-TFT circuits, such as decoders, drivers, and sense amplifiers, can be printed and hybrid-integrated with thinned (<50 μm) silicon chips on soft, thin, and flexible substrates for a wide range of applications, from flexible displays to wearable medical devices. Here, we report (1) a process design kit (PDK) to enable FHE design automation for large-scale FHE circuits and (2) solution process-proven intellectual property blocks for TFT circuits design, including Pseudo-Complementary Metal-Oxide-Semiconductor (Pseudo-CMOS) flexible digital logic and analog amplifiers. The FHE-PDK is fully compatible with popular silicon design tools for design and simulation of hybrid-integrated flexible circuits.

The Effect of Strain on the Formation of Dislocations at the SiGe/Si Interface

MRS Bulletin ◽  
1996 ◽  
Vol 21 (4) ◽  
pp. 38-44 ◽  
Author(s):  
F.K. LeGoues
Keyword(s):  
Metal Oxide ◽  
High Speed ◽  
High Performance ◽  
Field Effect Transistors ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Design Rule ◽  
Strained Si

Recently much interest has been devoted to Si-based heteroepitaxy, and in particular, to the SiGe/Si system. This is mostly for economical reasons: Si-based technology is much more advanced, is widely available, and is cheaper than GaAs-based technology. SiGe opens the door to the exciting (and lucrative) area of Si-based high-performance devices, although optical applications are still limited to GaAs-based technology. Strained SiGe layers form the base of heterojunction bipolar transistors (HBTs), which are currently used in commercial high-speed analogue applications. They promise to be low-cost compared to their GaAs counterparts and give comparable performance in the 2-20-GHz regime. More recently we have started to investigate the use of relaxed SiGe layers, which opens the door to a wider range of application and to the use of SiGe in complementary metal oxide semiconductor (CMOS) devices, which comprise strained Si and SiGe layers. Some recent successes include record-breaking low-temperature electron mobility in modulation-doped layers where the mobility was found to be up to 50 times better than standard Si-based metal-oxide-semiconductor field-effect transistors (MOSFETs). Even more recently, SiGe-basedp-type MOSFETS were built with oscillation frequency of up to 50 GHz, which is a new record, in anyp-type material for the same design rule.

FLIPPED VOLTAGE FOLLOWER ANALOG NONLINEAR CIRCUITS

2012 ◽  
Vol 21 (03) ◽  
pp. 1250024 ◽  
Author(s):  
CHAIWAT SAKUL ◽  
KOBCHAI DEJHAN
Keyword(s):  
Relative Error ◽  
Low Voltage ◽  
Harmonic Distortion ◽  
Input Voltage ◽  
Experimental Result ◽  
Voltage Range ◽  
Flipped Voltage Follower ◽  
Voltage Follower ◽  
Power Dispersion ◽  
Four Quadrant

This paper describes squaring and square-rooting circuits operable on low voltage supplies, with their application proposed hereby as vector-summation and four-quadrant multiplier circuits. These circuits make use of a flipped voltage follower (FVF) as fundamental circuit. A detail classification of basic topologies derived from the FVF is given. The proposed circuits have simple structure, wide input range and low power consumption as well as small number of devices. All circuits are also examined and supported by a set of simulations with PSpice program. The circuits can operate at power supply of ±0.7 volts, the input voltage range of the squaring circuit is ±0.8 volts with 1.59% relative error and 1.78 μW power dispersion, the input current of the square-rooting circuit is about 50 μA with 0.55% relative error and 1.4 μW power dispersion and the vector-summation circuit have linearity error of 0.23% and 2.92 μW power dispersion. As in four-quadrant multiplier circuit, the total harmonic distortion of the multiplier is less than 1.2% for 0.8 VP-P input signal at 1 MHz fundamental frequency. Experimental result is carried out to confirm the operation by using commercial CMOS transistor arrays (CD4007). These circuits are highly expected to be effective in further application of the low voltage analog signal processing.

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