scholarly journals FPGA Based Real-Time Emulation System for Power Electronics Converters

Energies ◽  
2019 ◽  
Vol 12 (6) ◽  
pp. 969 ◽  
Author(s):  
Jaka Marguč ◽  
Mitja Truntič ◽  
Miran Rodič ◽  
Miro Milanovič
Keyword(s):  
Power Electronics ◽  
Real Time ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Power Electronics Converters ◽  
Time Operation ◽  
Field Programmable ◽  
Real Time Operation ◽  
Synchronous Operation ◽  
Hard Real Time

This paper deals with an emulation system for Power Electronics Converters (PEC). The emulation of PECs is performed on a Field-Programmable Gate Array (FPGA) capable of hard real-time operation. To obtain such a system, the converter operation is described using a differential equations-based model designed with the graph theory. Differential equation coefficients are changed according to the type of converter and pulse-width modulation (PWM) signals. The tie-set and incidence matrix approach for the converter modelling is performed to describe the converter operation in a general way. Such approach enables that any type of PECs can be described appropriately. The emulator was verified experimentally by synchronous operation with a real DC-AC converter built for this purposes.

Design and Implementation of Pulse Width Modulation Using Hardware/Software MicroBlaze Soft-Core

2017 ◽  
Vol 8 (1) ◽  
pp. 167
Author(s):  
A. Zemmouri ◽  
R. Elgouri ◽  
M. Alareqi ◽  
M. Benbrahim ◽  
L. Hlou
Keyword(s):  
Real Time ◽  
Pulse Width ◽  
Hardware Implementation ◽  
Pulse Width Modulation ◽  
Clock Frequency ◽  
Embedded Control ◽  
Design And Implementation ◽  
Field Programmable ◽  
Speed Performance ◽  
Control Application

This paper presents an embedded control application of clock frequency to control the pulse width of the output signals, implemented on field programmable get array. This control allows the creation of lines of Pulse-width modulation depending on the numbers of card outputs, without using   the specific "Timers /Counters" blocks; this method is effective to adjust the amount of power supplied to an electrical charge. The purpose of this work is to achieve a real time hardware implementation with higher performance in both size and speed. Performance of these design implemented in field programmable get array virtex5 card, and Signals displayed on an oscilloscope.

scholarly journals Debugging and monitoring of applicationprograms in the BagrOS-4000 real-time operation system based on the Elbrus architecture

2019 ◽  
Vol 29 (1) ◽  
pp. 8-15
Author(s):  
R. G. Gordienko ◽  
O. G. Fedorenko ◽  
A. A. Demidov ◽  
A. V. Fedorov
Keyword(s):  
Operating System ◽  
Real Time ◽  
Monitoring System ◽  
Classical Method ◽  
Design Bureau ◽  
Real Time Operating System ◽  
Time Operation ◽  
Real Time Operation ◽  
Hard Real Time ◽  
Key Aspects

The article is concerned with the problems of monitoring and debugging of operating system processes, the effectiveness of which in the hard real-time operating system version does not allow any stopping to analyze the state of software and/ or hardware. The paper describes the concept of a debugging and monitoring system developed taking into account this feature in the Sukhoi design bureau for the BagrOS-4000 hard real-time operating system on the Elbrus architectural platform together with the specialists of MCST JSC. The method of non-stop monitoring and data collection in hard realtime processes in the multiprocess multimodular systems is discussed. An approach to the management of debugging targets in terms of source code using the DWARF debugging information specification is presented. The transition from the instrumental machine to the system server built into the target computer is described. Given the rationale for the use of client-server architecture in the debugging and monitoring system for BagrOS-4000. A comparative analysis of the key functionality of the debugging and monitoring system with the existing debugging systems has been carried out; the key aspects of the DMS architecture have been considered. The design of a machine-dependent interface required for the integration of the independent hardware platforms into the BagrOS-4000 system when implementing the system on an integrated avionics module of the onboard complex is discussed. The results of testing of the debugging and monitoring systems are analyzed in terms of efficiency versus the classical method of using the debug console prints when debugging a real-time operating system. Most of the above solutions are universal and have been successfully tested using other microprocessor platforms on multi-threaded application programs of real-time operating systems running on multi-core processors, including the MIPS, Power PC, Intel platforms.

Real Time Implementation of Speed Control of PMLSM with Space Vector Pulse Width Modulation using dSPACE

2013 ◽  
Vol 7 (2) ◽  
pp. 19-25
Author(s):  
B. Arundhati ◽  
◽  
K. Alice Mary ◽  
Surya Kalavathi M ◽  
K. Shankar ◽  
...  
Keyword(s):  
Real Time ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Speed Control ◽  
Space Vector

Real-Time Operation and Characterization of a High-Performance Time-Based Accelerometer

2015 ◽  
Vol 24 (6) ◽  
pp. 1703-1711 ◽  
Author(s):  
Rosana Alves Dias ◽  
Filipe Serra Alves ◽  
Margaret Costa ◽  
Helder Fonseca ◽  
Jorge Cabral ◽  
...  
Keyword(s):  
Real Time ◽  
High Performance ◽  
Performance Time ◽  
Time Operation ◽  
Real Time Operation

Cultural Change in ALS Real Time Operation and Optimization in Vaca Muerta Through CWE

2018 ◽  
Author(s):  
J. I. Alvarez Claramunt ◽  
P. E. Bizzotto ◽  
F. Sapag ◽  
E. Ferrigno ◽  
J. L. Barros ◽  
...  
Keyword(s):  
Real Time ◽  
Cultural Change ◽  
Time Operation ◽  
Vaca Muerta ◽  
Real Time Operation

scholarly journals A Novel Computational Approach for Harmonic Mitigation in PV Systems with Single-Phase Five-Level CHBMI

Energies ◽  
2018 ◽  
Vol 11 (8) ◽  
pp. 2100 ◽  
Author(s):  
Rosario Miceli ◽  
Giuseppe Schettino ◽  
Fabio Viola
Keyword(s):  
Single Phase ◽  
Switching Frequency ◽  
Polynomial Equations ◽  
Voltage Waveform ◽  
Pv Systems ◽  
Time Operation ◽  
Novel Approach ◽  
Field Programmable ◽  
Real Time Operation ◽  
Harmonic Mitigation

In this paper, a novel approach to low order harmonic mitigation in fundamental switching frequency modulation is proposed for high power photovoltaic (PV) applications, without trying to solve the cumbersome non-linear transcendental equations. The proposed method allows for mitigation of the first-five harmonics (third, fifth, seventh, ninth, and eleventh harmonics), to reduce the complexity of the required procedure and to allocate few computational resource in the Field Programmable Gate Array (FPGA) based control board. Therefore, the voltage waveform taken into account is different respect traditional voltage waveform. The same concept, known as “voltage cancelation”, used for single-phase cascaded H-bridge inverters, has been applied at a single-phase five-level cascaded H-bridge multilevel inverter (CHBMI). Through a very basic methodology, the polynomial equations that drive the control angles were detected for a single-phase five-level CHBMI. The acquired polynomial equations were implemented in a digital system to real-time operation. The paper presents the preliminary analysis in simulation environment and its experimental validation.

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