scholarly journals A DC Short-Circuit Fault Ride Through Strategy of MMC-HVDC Based on the Cascaded Star Converter

Energies ◽  
2018 ◽  
Vol 11 (8) ◽  
pp. 2079 ◽  
Author(s):  
Yingjie Wang ◽  
Bo Yang ◽  
Huifang Zuo ◽  
Haiyuan Liu ◽  
Haohao Yan
Keyword(s):  
Control Method ◽  
Short Circuit ◽  
Normal Operation ◽  
Zero Crossing ◽  
High Voltage Direct Current ◽  
Fault Ride Through ◽  
Power Load ◽  
Constant Power Load ◽  
Short Circuit Fault ◽  
Balancing Control

A modular multilevel converter based high voltage direct current (MMC-HVDC) with DC fault self-clearing is adopted to deal with the DC short-circuit fault. However, the constant power load characteristic of the sub-modules causes capacitor voltages to diverge and the converter to go out of hot standby. To address this problem, a novel DC short-circuit fault ride through strategy is proposed. According to the polarities of grid voltages, the working or blockage of the upper and lower bridge arms is chosen according to six sections to obtain a cascaded star converter. The capacitor voltages of MMC sub-modules are maintained and balanced through the control similar to the cascaded star converter. Moreover, in order not to change zero crossing, a cluster balancing control method by scaling the amplitudes of the modulated waves is proposed to balance the capacitor voltages between phase clusters. The strategy also achieves the DC Bus line-to-line equipotential and no fault current generated. With the switches of two modes (normal operation and fault ride through operation) after the fault is cleared, the power transfer of MMC-HVDC can be recovered quickly. Finally, the effectiveness of the proposed fault ride through strategy is demonstrated on the 21-level MMC-HVDC simulation model in PSCAD/EMTDC.

Optimized Non-Dead-Time Control of Inverter with Two-Phase Modulated SVPWM

2012 ◽  
Vol 562-564 ◽  
pp. 1531-1536
Author(s):  
Ming Xing Zhu ◽  
Jing Bo Shi
Keyword(s):  
Control Strategy ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Control Method ◽  
Short Circuit ◽  
Two Phase ◽  
Zero Crossing ◽  
Time Control ◽  
Bus Voltage ◽  
Current Zero

In the inverter control system, two-phase modulated space vector pulse width modulation (SVPWM) algorithm has the advantages of minimum switch loss and higher utilization of direct current (DC) bus voltage. Non-dead-time control strategy can eliminate the problems of the dead time effects. But the traditional non-dead-time control strategy heavily depends on the current zero-crossing detection, which may cause the output voltage distortion or even a short circuit. Based on the analysis of the reason for the distortion, a new optimized non-dead-time control method is proposed. Two methods for the detection of the overlapping area are enumerated. The conclusions are confirmed by the simulation results with MATLAB/ SIMULINK.

scholarly journals A Hybrid MMC Topology with dc Fault Ride-Through Capability for MTDC Transmission System

2015 ◽  
Vol 2015 ◽  
pp. 1-11
Author(s):  
Xinhan Meng ◽  
Ke-Jun Li ◽  
Zhuodi Wang ◽  
Wenning Yan ◽  
Jianguo Zhao
Keyword(s):  
Short Circuit ◽  
Harmonic Distortion ◽  
Transmission System ◽  
Simulation Software ◽  
Power System Simulation ◽  
Multilevel Converter ◽  
Harmonic Content ◽  
Dc Fault ◽  
Fault Ride Through ◽  
Short Circuit Fault

This paper proposes a hybrid modular multilevel converter (MMC) topology based on mismatched-cascade mechanism. The blocking conditions of different submodule (SM) structures under dc fault are analyzed and a series double submodule is presented. With series-double submodules and mismatched-cascade submodules, the proposed hybrid MMC can ride-through the dc side short-circuit fault and provide an output voltage with the feature of low harmonic content. This hybrid MMC topology can be used in the VSC based multiterminal dc (VSC-MTDC) transmission system. The dc fault ride-through properties of the new structure and the total harmonic distortion (THD) are analyzed compared with the previous full-bridge and clamp-double architectures. An appropriate fault blocking procedure is presented, and a typical four-terminal dc transmission simulation system is given in the power system simulation software. Finally, simulation of steady-state and dc bipolar short-circuit fault verifies that the MTDC system based on this new hybrid MMC topology is stabilized and can block the dc fault and return the nonfault parts to normal.

Fault Ride-Through Analysis and Protection of a 2-MW DFIG Tidal Current Turbine

2015 ◽  
Vol 49 (5) ◽  
pp. 49-57 ◽  
Author(s):  
Dahai Zhang ◽  
Ying Chen ◽  
Jing Yang ◽  
Ming Tan ◽  
Xiandong Ma ◽  
...  
Keyword(s):  
Tidal Current ◽  
Reactive Power ◽  
Short Circuit ◽  
Normal Operation ◽  
Fault Ride Through ◽  
Tidal Current Turbine ◽  
Doubly Fed ◽  
Crowbar Protection ◽  
Voltage Recovery ◽  
Current Turbine

AbstractThe purposes of this article are to report on a study of fault ride-through (FRT) capability improvements of a tidal current turbine with a doubly fed induction generator (DFIG) and to investigate protection schemes for power electronic converters without disconnection during grid faults. A dynamic model of a DFIG tidal current turbine is described in the article, taking into account the effect of crowbar protection on the system when subjected to disturbances, such as short circuit faults. Investigations into the dynamic behavior of tidal current turbines are made through extensive simulations via PSCAD/EMTDC software. The research demonstrates that both the timing of crowbar removal and the value of crowbar resistance have a significant impact on the system voltage recovery following grid faults. The article also demonstrates that the selection of an appropriate crowbar resistor value is critical in order to ensure that the DFIG returns to normal operation with active and reactive power control as quickly as possible.

scholarly journals An Improved Multiphysics Analysis Model for the Short-Circuit Fault Ride-Through Capability Evaluation of the MMC Submodule Busbar

IEEE Access ◽  
2021 ◽  
Vol 9 ◽  
pp. 119090-119099
Author(s):  
Yang Cai ◽  
Wenyong Guo ◽  
Wenju Sang ◽  
Fancheng Guo ◽  
Chenyu Tian ◽  
...  
Keyword(s):  
Short Circuit ◽  
Analysis Model ◽  
Fault Ride Through ◽  
Capability Evaluation ◽  
Short Circuit Fault
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