scholarly journals Ka-Band Marchand Balun with Edge- and Broadside-Coupled Hybrid Configuration

Electronics ◽  
2020 ◽  
Vol 9 (7) ◽  
pp. 1116
Author(s):  
Jinna Yan ◽  
Hang Liu ◽  
Xi Zhu ◽  
Kai Men ◽  
Kiat Seng Yeo

This article presents a novel Ka-band Marchand balun implemented in 0.13-μm SiGe bipolar complementary metal–oxide–semiconductor (BiCMOS) process. By combining both edge- and broadside-coupled structures, the new hybrid balun is able to increase the coupling and minimize the balun insertion loss. As compared with conventional edge-coupled or broadside-coupled structures, the proposed balun achieves the lowest insertion loss of 1.02 dB across a wide 1-dB bandwidth from 29.0 GHz to 46.0 GHz, with a core size of 270 μm × 280 μm.

2021 ◽  
Vol 50 (16) ◽  
pp. 5540-5551
Author(s):  
Almudena Notario-Estévez ◽  
Xavier López ◽  
Coen de Graaf

This computational study presents the molecular conduction properties of polyoxovanadates V6O19 (Lindqvist-type) and V18O42, as possible successors of the materials currently in use in complementary metal–oxide semiconductor (CMOS) technology.


2020 ◽  
Vol 1 (9) ◽  
pp. 3200-3207
Author(s):  
Stephan Steinhauer ◽  
Eva Lackner ◽  
Florentyna Sosada-Ludwikowska ◽  
Vidyadhar Singh ◽  
Johanna Krainer ◽  
...  

SnO2-based chemoresistive sensors integrated in complementary metal-oxide-semiconductor technology were functionalized with ultrasmall Pt nanoparticles, resulting in carbon monoxide sensing properties with minimized humidity interference.


Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1683
Author(s):  
Winai Jaikla ◽  
Fabian Khateb ◽  
Tomasz Kulej ◽  
Koson Pitaksuttayaprot

This paper proposes the simulated and experimental results of a universal filter using the voltage differencing differential difference amplifier (VDDDA). Unlike the previous complementary metal oxide semiconductor (CMOS) structures of VDDDA that is present in the literature, the present one is compact and simple, owing to the employment of the multiple-input metal oxide semiconductor (MOS) transistor technique. The presented filter employs two VDDDAs, one resistor and two grounded capacitors, and it offers low-pass: LP, band-pass: BP, band-reject: BR, high-pass: HP and all-pass: AP responses with a unity passband voltage gain. The proposed universal voltage mode filter has high input impedances and low output impedance. The natural frequency and bandwidth are orthogonally controlled by using separated transconductance without affecting the passband voltage gain. For a BP filter, the root mean square (RMS) of the equivalent output noise is 46 µV, and the third intermodulation distortion (IMD3) is −49.5 dB for an input signal with a peak-to peak of 600 mV, which results in a dynamic range (DR) of 73.2 dB. The filter was designed and simulated in the Cadence environment using a 0.18-µm CMOS process from Taiwan semiconductor manufacturing company (TSMC). In addition, the experimental results were obtained by using the available commercial components LM13700 and AD830. The simulation results are in agreement with the experimental one that confirmed the advantages of the filter.


1998 ◽  
Vol 37 (Part 1, No. 3B) ◽  
pp. 1050-1053 ◽  
Author(s):  
Masayasu Miyake ◽  
Toshio Kobayashi ◽  
Yutaka Sakakibara ◽  
Kimiyoshi Deguchi ◽  
Mitsutoshi Takahashi

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