scholarly journals Matrix Extraction of Parasitic Parameters and Suppression of Common-Mode Conducted Interference in a PMSG-IDOS Rectifier Module

Electronics ◽  
2020 ◽  
Vol 9 (2) ◽  
pp. 206
Author(s):  
Jinfeng Liu ◽  
Chunjian Xia ◽  
Lantian Liu ◽  
Xudong Wang
Keyword(s):  
Extraction Method ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Synchronous Generator ◽  
Common Mode ◽  
Three Phase ◽  
The Matrix ◽  
Parasitic Parameters ◽  
Backward Control ◽  
The Common

The rectifier module is the key part of a permanent magnet synchronous generator integrated DC output system (PMSG-IDOS) with low-voltage and high-current. The high-speed switching device of the rectifier module is the main source of electromagnetic interference (EMI). In this paper, the matrix extraction method is proposed to establish an accurate conducted interference model, and a 3D crimped SiC MOSFET model is established via Ansoft Q3D simulation software. The matrix of the parasitic parameters between poles of the MOSFET is simulated to extract the accurate parasitic parameters. Furthermore, a high-precision conducted interference simulation model of the pulse width modulation (PWM) rectifier system is established. Then, the space vector pulse width modulation (SVPWM) jump-backward control strategy based on the three-phase four-leg structure is proposed to suppress the common-mode interference, and the comparison with other two methods is carried out based on this model. Finally, the experimental platform of a 5 V/1000 A synchronous generator with rectifier is constructed, and conducted interference is tested in accordance with the simulated results. It demonstrates the accuracy of the model with parasitic parameters based on the matrix extraction method. This paper provides a more simple and effective reference method for the prediction study of conducted interference in power converter systems. After comparing the simulation results with the experimental results, it is proven that the SVPWM jump-backward control strategy based on the three-phase four-leg structure can ensure the output balance of the bridge leg and allow the common-mode (CM) interference to reach the ideal state.

scholarly journals Opposite Triangle Carrier with SVPWM for Common-Mode Voltage Reduction in Dual Three Phase Motor Drives

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 282
Author(s):  
Seon-Ik Hwang ◽  
Jang-Mok Kim
Keyword(s):  
Electromagnetic Interference ◽  
Pulse Width Modulation ◽  
Motor Drives ◽  
Common Mode ◽  
Pwm Inverter ◽  
Common Mode Voltage ◽  
Voltage Vector ◽  
Three Phase ◽  
The Common ◽  
Zero Voltage

The common-mode voltage (CMV) generated by the switching operation of the pulse width modulation (PWM) inverter leads to bearing failure and electromagnetic interference (EMI) noises. To reduce the CMV, it is necessary to reduce the magnitude of dv/dt and change the frequency of the CMV. In this paper, the range of the CMV is reduced by using opposite triangle carrier for ABC and XYZ winding group, and the change in frequency in the CMV is reduced by equalizing the dwell time of the zero voltage vector on ABC and XYZ winding group of dual three phase motor.

scholarly journals Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter

Energies ◽  
2020 ◽  
Vol 13 (15) ◽  
pp. 3884
Author(s):  
Jian Zheng ◽  
Mingcheng Lyu ◽  
Shengqing Li ◽  
Qiwu Luo ◽  
Keyuan Huang
Keyword(s):  
High Frequency ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Voltage Source ◽  
Switching Frequency ◽  
Voltage Source Inverter ◽  
Large Magnitude ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Three Phase

Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.

scholarly journals A Method for the Simultaneous Suppression of DC Capacitor Fluctuations and Common-Mode Voltage in a Five-Level NPC/H Bridge Inverter

Energies ◽  
2019 ◽  
Vol 12 (5) ◽  
pp. 779 ◽  
Author(s):  
Ming Wu ◽  
Zhenhao Song ◽  
Zhipeng Lv ◽  
Kai Zhou ◽  
Qi Cui
Keyword(s):  
Pulse Width Modulation ◽  
Neutral Point ◽  
Common Mode ◽  
Mapping Algorithm ◽  
Common Mode Voltage ◽  
Point Potential ◽  
Voltage Vector ◽  
Three Phase ◽  
Simulation And Experiment ◽  
The Common

To suppress the direct current (DC) capacitor voltage fluctuations and the common-mode voltage (CMV) in a three-phase, five-level, neutral-point-clamped (NPC)/H-bridge inverter, this paper analyzes the influence of all voltage vectors on the neutral point potential of each phase under different pulse mappings in detail with an explanation of the CMV distribution. Then, based on the traditional space vector pulse width modulation (SVPWM) algorithm, a dual-pulse-mapping algorithm is proposed to suppress the DC capacitor fluctuations and the CMV simultaneously. In the algorithm, the reference voltage synthesis selects the voltage vector that has the smallest CMV value as the priority. In addition, the two kinds of pulse mappings that have opposite effects on the neutral point potential are switched to output. At the same time, regulating factors are introduced to adjust the working time of each voltage vector under the two pulse mappings; then, the capacitor voltages can be balanced. Both the simulation and experiment demonstrate the algorithm’s effectiveness.

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