scholarly journals Design of a Wide-Band Voltage-Controlled Ring Oscillator Implemented in 180 nm CMOS Technology

Electronics ◽  
2019 ◽  
Vol 8 (10) ◽  
pp. 1156 ◽  
Author(s):  
Esteban Tlelo-Cuautle ◽  
Perla Rubi Castañeda-Aviña ◽  
Rodolfo Trejo-Guerra ◽  
Victor Hugo Carbajal-Gómez

The design of a wide-band voltage-controlled oscillator (VCO) modified as a VCO with programmable tail currents is introduced herein. The VCO is implemented by using CMOS current-mode logic stages, which are based on differential pairs that are connected in a ring topology. SPICE simulation results show that the VCO operates within the frequency ranges of 2.65–5.65 GHz, and when it is modified, the VCO with programmable tail currents operates between 1.38 GHz and 4.72 GHz. The design of the CMOS differential stage is detailed along with the symbolic approximation of its dominant pole, which is varied to increase the frequency response in order to achieve a higher oscillation frequency when implementing the ring oscillator structure. The layout of the VCO is described and pre- and post-layout simulations are provided, which are in good agreement using CMOS technology of 180 nm. Finally, process, voltage and temperature variations are performed to guarantee robustness of the designed CMOS ring oscillator.

2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Kirti Gupta ◽  
Neeta Pandey ◽  
Maneesha Gupta

A new MOS current mode logic (MCML) style exhibiting capacitive coupling to enhance the switching speed of the digital circuits is proposed. The mechanism of capacitive coupling and its effect on the delay are analytically modeled. SPICE simulations to validate the accuracy of the analytical model have been carried out with TSMC 0.18 μm CMOS technology parameters. Several logic gates such as five-stage ring oscillator, NAND, XOR2, XOR3, multiplexer, and demultiplexer based on the proposed logic style are implemented and their performance is compared with the conventional logic gates. It is found that the logic gates based on the proposed MCML style lower the delay by 23 percent. An asynchronous FIFO based on the proposed MCML style has also been implemented as an application.


2012 ◽  
Vol 2012 ◽  
pp. 1-7 ◽  
Author(s):  
Kirti Gupta ◽  
Neeta Pandey ◽  
Maneesha Gupta

Multithreshold MOS Current Mode Logic (MCML) implementation of asynchronous pipeline circuits, namely, a C-element and a double-edge triggered flip-flop is proposed. These circuits use multiple-threshold MOS transistors for reducing power consumption. The proposed circuits are implemented and simulated in PSPICE using TSMC 0.18 μm CMOS technology parameters. The performance of the proposed circuits is compared with the conventional MCML circuits. The results indicate that the proposed circuits reduce the power consumption by 21 percent in comparison to the conventional ones. To demonstrate the functionality of the proposed circuits, an asynchronous FIFO has also been implemented.


2019 ◽  
Vol 29 (08) ◽  
pp. 2050128
Author(s):  
Zied Sakka ◽  
Nadia Gargouri ◽  
Mounir Samet

This paper presents a low power temperature compensated CMOS ring oscillator for biomedical applications across a wide temperature range. The proposed circuit deploys an IPTAT (inversely proportional to absolute temperature) bias current by generating an adaptive control voltage in each stage of the oscillator to compensate the overall oscillator’s temperature coefficient (TC). Simulations using TSMC 0.18[Formula: see text][Formula: see text]m CMOS technology show that this configuration can achieve a frequency variation less than 0.25%, leading to an average frequency drift of 20.83[Formula: see text]ppm/∘C. Monte Carlo simulations have also been performed and demonstrate a 3[Formula: see text] deviation of about 2.15%. The power dissipated by the proposed circuit is only 8.48[Formula: see text]mW at 25∘C.


2011 ◽  
Vol 2011 ◽  
pp. 1-7 ◽  
Author(s):  
Neeta Pandey ◽  
Sajal K. Paul

A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.


2011 ◽  
Vol 2011 ◽  
pp. 1-5 ◽  
Author(s):  
Neeta Pandey ◽  
Sajal K. Paul

This paper presents a single current difference transconductance amplifier (CDTA) based all-pass current mode filter. The proposed configuration makes use of a grounded capacitor which makes it suitable for IC implementation. Its input impedance is low and output impedance is high, hence suitable for cascading. The circuit does not use any matching constraint. The nonideality analysis of the circuit is also given. Two applications, namely, a quadrature oscillator and a highQband pass filter are developed with the proposed circuit. The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.


2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Neeta Pandey ◽  
Rajeshwari Pandey

This paper presents a current mode full-wave rectifier based on single modified Z copy current difference transconductance amplifier (MZC-CDTA) and two switches. The circuit is simple and is suitable for IC implementation. The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.


2017 ◽  
Vol 26 (05) ◽  
pp. 1750080 ◽  
Author(s):  
Nadia Gargouri ◽  
Dalenda Ben Issa ◽  
Zied Sakka ◽  
Abdennaceur Kachouri ◽  
Mounir Samet

This study presents a two-stage ring voltage-controlled oscillator (VCO) for use in impulse-radio ultra-wideband (IR-UWB) applications. A systematic and efficient graphical optimization method was employed to find the optimal dimensions of the VCO which give a best performance. A good agreement was observed between the desired specifications and simulation results with regard to the optimum component size of the VCO circuit. The operation range of the VCO was extended to cover an ultra-wide tuning range of 176.6%. The phase noise was [Formula: see text]107.1[Formula: see text]dBc/Hz at 10[Formula: see text]MHz offset frequency from a carrier frequency of 4[Formula: see text]GHz. The power consumption of VCO was 7.41[Formula: see text]mW from a 1.8[Formula: see text]V supply voltage. A large tuning range, low power, and appropriate phase noise were obtained with the optimum components size obtained through the optimization method.


Sensors ◽  
2020 ◽  
Vol 20 (16) ◽  
pp. 4612 ◽  
Author(s):  
Danilo Monda ◽  
Gabriele Ciarpi ◽  
Sergio Saponara

This work presented a comparison between two Voltage Controlled Oscillators (VCOs) designed in 65 nm CMOS technology. The first architecture based on a Ring Oscillator (RO) was designed using three Current Mode Logic (CML) stages connected in a loop, while the second one was based on an LC-tank resonator. This analysis aimed to choose a VCO architecture able to be integrated into a rad-hard Phase Locked Loop. It had to meet the requirements of the SpaceFibre protocol, which supports frequencies up to 6.25 GHz, for space applications. The full custom schematic and layout designs are shown, and Single Event Effect simulations results, performed with a double exponential current pulses generator, are presented in detail for both VCOs. Although the RO-VCO performances in terms of technology scaling and high-integration density were attractive, the simulations on the process variations demonstrated its inability to generate the target frequency in harsh operating conditions. Instead, the LC-VCO highlighted a lower influence through Process-Voltage-Temperature simulations on the oscillation frequency. Both architectures were biased with a supply voltage of 1.2 V. The achieved results for the second architecture analyzed were attractive to address the requirements of the new SpaceFibre aerospace standard.


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