scholarly journals The Impact of Interfacial Charge Trapping on the Reproducibility of Measurements of Silicon Carbide MOSFET Device Parameters

Crystals ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 1143
Author(s):  
Maximilian W. Feil ◽  
Andreas Huerner ◽  
Katja Puschkarsky ◽  
Christian Schleich ◽  
Thomas Aichinger ◽  
...  

Silicon carbide is an emerging material in the field of wide band gap semiconductor devices. Due to its high critical breakdown field and high thermal conductance, silicon carbide MOSFET devices are predestined for high-power applications. The concentration of defects with short capture and emission time constants is higher than in silicon technologies by orders of magnitude which introduces threshold voltage dynamics in the volt regime even on very short time scales. Measurements are heavily affected by timing of readouts and the applied gate voltage before and during the measurement. As a consequence, device parameter determination is not as reproducible as in the case of silicon technologies. Consequent challenges for engineers and researchers to measure device parameters have to be evaluated. In this study, we show how the threshold voltage of planar and trench silicon carbide MOSFET devices of several manufacturers react on short gate pulses of different lengths and voltages and how they influence the outcome of application-relevant pulsed current-voltage characteristics. Measurements are performed via a feedback loop allowing in-situ tracking of the threshold voltage with a measurement delay time of only 1 μs. Device preconditioning, recently suggested to enable reproducible BTI measurements, is investigated in the context of device parameter determination by varying the voltage and the length of the preconditioning pulse.

Author(s):  
Marco Buzzo ◽  
Mauro Ciappa ◽  
Wolfgang Fichtner

Abstract Secondary electrons potential contrast (SEPC) by scanning electron microscopy has emerged as a powerful tool for two-dimensional quantitative dopant imaging. The main component of the SEPC signal arises from the difference in the built-in potential between differently doped regions; which is very high in wide-band-gap semiconductors and particularly intense in SiC. This paper, after discussing the physical principles leading to the dopant contrast and the proper experimental setup, investigates the impact of relevant factors such as experimental conditions, surface effects, and sample preparation on image quality. The quantitative capabilities of this technique are demonstrated by the analysis of different test structures and prototypes of power devices such as MOSFET and JFET. The application to completely process devices demonstrates that SEPC represents an unequalled characterization technique, which provides accurate imaging and dopant profiling capabilities for silicon carbide devices.


Materials ◽  
2021 ◽  
Vol 14 (3) ◽  
pp. 568 ◽  
Author(s):  
Matteo Hakeem Kushoro ◽  
Marica Rebai ◽  
Marco Tardocchi ◽  
Carmen Altana ◽  
Carlo Cazzaniga ◽  
...  

The use of wide-band-gap solid-state neutron detectors is expanding in environments where a compact size and high radiation hardness are needed, such as spallation neutron sources and next-generation fusion machines. Silicon carbide is a very promising material for use as a neutron detector in these fields because of its high resistance to radiation, fast response time, stability and good energy resolution. In this paper, measurements were performed with neutrons from the ISIS spallation source with two different silicon carbide detectors together with stability measurements performed in a laboratory under alpha-particle irradiation for one week. Some consideration to the impact of the casing of the detector on the detector’s counting rate is given. In addition, the detector response to Deuterium-Deuterium (D-D) fusion neutrons is described by comparing neutron measurements at the Frascati Neutron Generator with a GEANT4 simulation. The good stability measurements and the assessment of the detector response function indicate that such a detector can be used as both a neutron counter and spectrometer for 2–4 MeV neutrons. Furthermore, the absence of polarization effects during neutron and alpha irradiation makes silicon carbide an interesting alternative to diamond detectors for fast neutron detection.


Micro ◽  
2022 ◽  
Vol 2 (1) ◽  
pp. 23-53
Author(s):  
Fabrizio Roccaforte ◽  
Filippo Giannazzo ◽  
Giuseppe Greco

Wide band gap semiconductors such as silicon carbide (SiC) and gallium nitride (GaN) are excellent materials for the next generation of high-power and high-frequency electronic devices. In fact, their wide band gap (>3 eV) and high critical electric field (>2 MV/cm) enable superior performances to be obtained with respect to the traditional silicon devices. Hence, today, a variety of diodes and transistors based on SiC and GaN are already available in the market. For the fabrication of these electronic devices, selective doping is required to create either n-type or p-type regions with different functionalities and at different doping levels (typically in the range 1016–1020 cm−3). In this context, due to the low diffusion coefficient of the typical dopant species in SiC, and to the relatively low decomposition temperature of GaN (about 900 °C), ion implantation is the only practical way to achieve selective doping in these materials. In this paper, the main issues related to ion implantation doping technology for SiC and GaN electronic devices are briefly reviewed. In particular, some specific literature case studies are illustrated to describe the impact of the ion implantation doping conditions (annealing temperature, electrical activation and doping profiles, surface morphology, creation of interface states, etc.) on the electrical parameters of power devices. Similarities and differences in the application of ion implantation doping technology in the two materials are highlighted in this paper.


2020 ◽  
Vol 10 (1) ◽  
pp. 3
Author(s):  
Esteban Guevara ◽  
Victor Herrera-Pérez ◽  
Cristian Rocha ◽  
Katherine Guerrero

In this study, threshold voltage instability on commercial silicon carbide (SiC) power metal oxide semiconductor field electric transistor MOSFETs was evaluated using devices manufactured from two different manufacturers. The characterization process included PBTI (positive bias temperature instability) and pulsed IV measurements of devices to determine electrical parameters’ degradations. This work proposes an experimental procedure to characterize silicon carbide (SiC) power MOSFETs following two characterization methods: (1) Using the one spot drop down (OSDD) measurement technique to assess the threshold voltage explains temperature dependence when used on devices while they are subjected to high temperatures and different gate voltage stresses. (2) Measurement data processing to obtain hysteresis characteristics variation and the damage effect over threshold voltage. Finally, based on the results, it was concluded that trapping charge does not cause damage on commercial devices due to reduced value of recovery voltage, when a negative small voltage is applied over a long stress time. The motivation of this research was to estimate the impact and importance of the bias temperature instability for the application fields of SiC power n-MOSFETs. The importance of this study lies in the identification of the aforementioned behavior where SiC power n-MOSFETs work together with complementary MOS (CMOS) circuits.


2019 ◽  
Vol 16 ◽  
Author(s):  
Mohammad Reza Niazian ◽  
Laleh Farhang Matin ◽  
Mojtaba Yaghobi ◽  
Amir Ali Masoudi

Background: Recently, molecular electronics have attracted the attention of many researchers, both theoretically and applied electronics.Nanostructures have significant thermal properties, which is why they are considered as good options for designing a new generation of integrated electronic devices. Objective: In this paper, the focus is on the thermoelectric properties of the molecular junction points with the electrodes. Also, the influence of the number of atom contacts was investigated on the thermoelectric properties of molecule located between two electrodes metallic.Therefore, the thermoelectric characteristics of the B12 N12 molecule are investigated. Methods: For this purpose, the Green’s function theory as well as mapping technique approach with the wide-band approximation and also the inelastic behaviour is considered for the electron-phonon interactions. Results & Conclusion: Results & Conclusion:It is observed that the largest values of the total part of conductance as well as its elastic (G(e,n)max) depends on the number of atom contacts and are arranged as: G(e,1)max>G(e,4)max>G(e,6)max. Furthermore, the largest values of the electronic thermal conductance, i.e. Kpmax is seen to be in the order of K(p,4)max < K(p,1)max < K(p,6)max that the number of main peaks increases in four-atom contacts at (E<Ef). Furthermore, it is represented that the thermal conductance shows an oscillatory behavior which is significantly affected by the number of atom contacts.


2019 ◽  
Vol 9 (4) ◽  
pp. 504-511
Author(s):  
Sikha Mishra ◽  
Urmila Bhanja ◽  
Guru Prasad Mishra

Introduction: A new analytical model is designed for Workfunction Modulated Rectangular Recessed Channel-Silicon On Insulator (WMRRC-SOI) MOSFET that considers the concept of groove gate and implements an idea of workfunction engineering. Methods: The impact of Negative Junction Depth (NJD) and oxide thickness (tox) are analyzed on device performances such as Sub-threshold Slope (SS), Drain Induced Barrier Lowering (DIBL) and threshold voltage. Results: The results of the proposed work are evaluated with the Rectangular Recessed Channel-Silicon On Insulator (RRC-SOI) MOSFET keeping the metal workfunction constant throughout the gate region. Furthermore, an analytical model is developed using 2D Poisson’s equation and threshold voltage is estimated in terms of minimum surface potential. Conclusion: In this work, the impact of Negative Junction Depth (NJD) on minimum surface potential and the drain current are also evaluated. It is observed from the analysis that the analog switching performance of WMRRC-SOI MOSFET surpasses RRC-SOI MOSFET in terms of better driving capability, high Ion/Ioff ratio, minimized Short Channel Effects (SCEs) and hot carrier immunity. Results are simulated using 2D Sentaurus TCAD simulator for validation of the proposed structure.


2019 ◽  
Vol 19 (2) ◽  
pp. 268-274 ◽  
Author(s):  
J. Franco ◽  
Z. Wu ◽  
G. Rzepa ◽  
L.-A. Ragnarsson ◽  
H. Dekkers ◽  
...  

2001 ◽  
Vol 664 ◽  
Author(s):  
C. Y. Wang ◽  
E. H. Lim ◽  
H. Liu ◽  
J. L. Sudijono ◽  
T. C. Ang ◽  
...  

ABSTRACTIn this paper the impact of the ESL (Etch Stop layer) nitride on the device performance especially the threshold voltage (Vt) has been studied. From SIMS analysis, it is found that different nitride gives different H concentration, [H] in the Gate oxide area, the higher [H] in the nitride film, the higher H in the Gate Oxide area and the lower the threshold voltage. It is also found that using TiSi instead of CoSi can help to stop the H from diffusing into Gate Oxide/channel area, resulting in a smaller threshold voltage drift for the device employed TiSi. Study to control the [H] in the nitride film is also carried out. In this paper, RBS, HFS and FTIR are used to analyze the composition changes of the SiN films prepared using Plasma enhanced Chemical Vapor deposition (PECVD), Rapid Thermal Chemical Vapor Deposition (RTCVD) with different process parameters. Gas flow ratio, RF power and temperature are found to be the key factors that affect the composition and the H concentration in the film. It is found that the nearer the SiN composition to stoichiometric Si3N4, the lower the [H] in SiN film because there is no excess silicon or nitrogen to be bonded with H. However the lowest [H] in the SiN film is limited by temperature. The higher the process temperature the lower the [H] can be obtained in the SiN film and the nearer the composition to stoichiometric Si3N4.


2008 ◽  
Vol 1066 ◽  
Author(s):  
Kyung-Wook Shin ◽  
Mohammad R. Esmaeili-Rad ◽  
Andrei Sazonov ◽  
Arokia Nathan

ABSTRACTHydrogenated nanocrystalline silicon (nc-Si:H) has strong potential to replace the hydrogenated amorphous silicon (a-Si:H) in thin film transistors (TFTs) due to its compatibility with the current industrial a-Si:H processes, and its better threshold voltage stability [1]. In this paper, we present an experimental TFT array backplane for direct conversion X-ray detector, using inverted staggered bottom gate nc-Si:H TFT as switching element. The TFTs employed a nc-Si:H/a-Si:H bilayer as the channel layer and hydrogenated amorphous silicon nitride (a-SiNx) as the gate dielectric; both layers deposited by plasma enhanced chemical vapor deposition (PECVD) at 280°C. Each pixel consists of a switching TFT, a charge storage capacitor (Cpx), and a mushroom electrode which serves as the bottom contact for X-ray detector such as amorphous selenium photoconductor. The chemical composition of the a-SiNx was studied by Fourier transform infrared spectroscopy. Current-voltage measurements of the a-SiNx film demonstrate that a breakdown field of 4.3 MV/cm.. TFTs in the array exhibits a field effect mobility (μEF) of 0.15 cm2/V·s, a threshold voltage (VTh) of 5.71 V, and a subthreshold leakage current (Isub) of 10−10 A. The fabrication sequence and TFT characteristics will be discussed in details.


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