Introducing Electrode Contact by Controlled Micro-Alloying in Few-Layered GaTe Field Effect Transistors

Crystals ◽  
2020 ◽  
Vol 10 (3) ◽  
pp. 144
Author(s):  
Xiuxin Xia ◽  
Xingdan Sun ◽  
Hanwen Wang ◽  
Xiaoxi Li

Recently, gallium telluride (GaTe) has triggered much attention for its unique properties and offers excellent opportunities for nanoelectronics. Yet it is a challenge to bridge the semiconducting few-layered GaTe crystals with metallic electrodes for device applications. Here, we report a method on fabricating electrode contacts to few-layered GaTe field effect transistors (FETs) by controlled micro-alloying. The devices show linear I-V curves and on/off ratio of ∼10 4 on HfO 2 substrates. Kelvin probe force microscope (KPFM) and energy dispersion spectrum (EDS) are performed to characterize the electrode contacts, suggesting that the lowered Schottky barrier by the diffusion of Pd element into the GaTe conduction channel may play an important role. Our findings provide a strategy for the engineering of electrode contact for future device applications based on 2DLMs.

2017 ◽  
Vol 16 (1) ◽  
pp. 69-74
Author(s):  
Md Iktiham Bin Taher ◽  
Md. Tanvir Hasan

Gallium nitride (GaN) based metal-oxide semiconductor field-effect transistors (MOSFETs) are promising for switching device applications. The doping of n- and p-layers is varied to evaluate the figure of merits of proposed devices with a gate length of 10 nm. Devices are switched from OFF-state (gate voltage, VGS = 0 V) to ON-state (VGS = 1 V) for a fixed drain voltage, VDS = 0.75 V. The device with channel doping of 1×1016 cm-3 and source/drain (S/D) of 1×1020 cm-3 shows good device performance due to better control of gate over channel. The ON-current (ION), OFF-current (IOFF), subthreshold swing (SS), drain induce barrier lowering (DIBL), and delay time are found to be 6.85 mA/μm, 5.15×10-7 A/μm, 87.8 mV/decade, and 100.5 mV/V, 0.035 ps, respectively. These results indicate that GaN-based MOSFETs are very suitable for the logic switching application in nanoscale regime.


2003 ◽  
Vol 2 (3) ◽  
pp. 175-180 ◽  
Author(s):  
D.L. John ◽  
L.C. Castro ◽  
J. Clifford ◽  
D.L. Pulfrey

Author(s):  
Changhoon Lee ◽  
Changwoo Han ◽  
Changhwan Shin

Abstract As the physical size of semiconductor devices continues to be aggressively scaled down, feedback field-effect transistors (FBFET) with a positive feedback mechanism among a few promising steep switching devices have received attention as next-generation switching devices. Conventional FBFETs have been studied to explore their device performance. However, this has been restricted to the case of single FBFET; basic circuit designs with FBFETs have not been investigated extensively. In this work, we propose an inverter circuit design with silicon-on-insulator (SOI) FBFETs; we verified this inverter design with mixed-mode technology computer-aided design simulation. The basic principles and mechanisms for designing FBFET inverter circuits are explained because their configuration is different from conventional inverters. In addition, the device parameters necessary to optimize circuit construction are introduced for logic device applications.


Author(s):  
Fengben Xi ◽  
Yi Han ◽  
Andreas Tiedemann ◽  
Detlev Grutzmacher ◽  
Qing-Tai Zhao

2020 ◽  
Vol 11 (4) ◽  
pp. 1466-1472 ◽  
Author(s):  
Qijing Wang ◽  
Sai Jiang ◽  
Bowen Zhang ◽  
Eul-Yong Shin ◽  
Yong-Young Noh ◽  
...  

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