Indoor Navigation using Consumer Portable Devices in Cart/Stroller

2017 ◽  
Author(s):  
Amr Al-Hamad ◽  
Abdelrahman Ali ◽  
Mostafa Elhoushi ◽  
Jacques Georgy
Keyword(s):  
Indoor Navigation ◽  
Portable Devices

scholarly journals WiFi-Aided Magnetic Matching for Indoor Navigation with Consumer Portable Devices

Micromachines ◽  
2015 ◽  
Vol 6 (6) ◽  
pp. 747-764 ◽  
Author(s):  
You Li ◽  
Yuan Zhuang ◽  
Haiyu Lan ◽  
Peng Zhang ◽  
Xiaoji Niu ◽  
...  
Keyword(s):  
Indoor Navigation ◽  
Portable Devices

Impact of Negative Urgency Craving for Multiuse Portable Devices

2014 ◽  
Author(s):  
Elizabeth C. Katz ◽  
David R. Earnest ◽  
Chris Lewis
Keyword(s):  
Portable Devices ◽  
Negative Urgency

Dosimetry and optimization in digital radiography based on the contrast-detail resolution

2018 ◽  
Vol 6 (3) ◽  
Author(s):  
Wilson Otto Gomes Batista ◽  
Alexandre Gomes De Carvalho
Keyword(s):  
Image Quality ◽  
Inverse Image ◽  
Point Of View ◽  
Complete Analysis ◽  
Portable Devices ◽  
Evaluation Tool ◽  
Air Kerma ◽  
Direct Radiography ◽  
Definition Of ◽  
Entrance Surface Air Kerma

Contrast-detail (C-D) curves are useful in evaluating the radiographic image quality in a global way. The objective of the present study was to obtain the C-D curves and the inverse image quality figure. Both of these parameters were used as an evaluation tool for abdominal and chest imaging protocols. The C-D curves were obtained with the phantom CDRAD 2.0 in computerized radiography and the direct radiography systems (including portable devices). The protocols were 90 and 102 kV in the range of 2 to 20 mAs for the chest and 80 kV in the range of 10 to 80 mAs for the abdomen. The incident air kerma values were evaluated with a solid state sensor. The analysis of these C-D curves help to identify which technique would allow a lower value of the entrance surface air kerma, Ke, while maintaining the image quality from the point of view of C-D detectability. The results showed that the inverse image quality figure, IQFinv, varied little throughout the range of mAs, while the value of Ke varied linearly directly with the mAs values. Also, the complete analysis of the curves indicated that there was an increase in the definition of the details with increasing mAs. It can be concluded that, in the transition phase for the use of the new receptors, it is necessary to evaluate and adjust the practised protocols to ensure, at a minimum, the same levels of the image quality, taking into account the aspects of the radiation protection of the patient.

Indoor Navigation System of Omni-Directional Mobile Robot Based on Static Obstacles Avoidance

2020 ◽  
Vol 13 (1) ◽  
pp. 27
Author(s):  
Shaaban Ali Salman ◽  
Qais A. Khasawneh ◽  
Mohammad A. Jaradat ◽  
Mansour Y. Alramlawi
Keyword(s):  
Mobile Robot ◽  
Navigation System ◽  
Indoor Navigation ◽  
Indoor Navigation System

Efficient Instruction and Data Caching for High Performance Embedded Processors

1970 ◽  
pp. 9
Author(s):  
A. Ferrerón Labari ◽  
D. Suárez Gracia ◽  
V. Viñals Yúfera
Keyword(s):  
Embedded Systems ◽  
Power Consumption ◽  
Low Power ◽  
Interconnection Networks ◽  
High Performance ◽  
Critical Issue ◽  
Content Management ◽  
Structure Design ◽  
Portable Devices ◽  
On Chip

In the last years, embedded systems have evolved so that they offer capabilities we could only find before in high performance systems. Portable devices already have multiprocessors on-chip (such as PowerPC 476FP or ARM Cortex A9 MP), usually multi-threaded, and a powerful multi-level cache memory hierarchy on-chip. As most of these systems are battery-powered, the power consumption becomes a critical issue. Achieving high performance and low power consumption is a high complexity challenge where some proposals have been already made. Suarez et al. proposed a new cache hierarchy on-chip, the LP-NUCA (Low Power NUCA), which is able to reduce the access latency taking advantage of NUCA (Non-Uniform Cache Architectures) properties. The key points are decoupling the functionality, and utilizing three specialized networks on-chip. This structure has been proved to be efficient for data hierarchies, achieving a good performance and reducing the energy consumption. On the other hand, instruction caches have different requirements and characteristics than data caches, contradicting the low-power embedded systems requirements, especially in SMT (simultaneous multi-threading) environments. We want to study the benefits of utilizing small tiled caches for the instruction hierarchy, so we propose a new design, ID-LP-NUCAs. Thus, we need to re-evaluate completely our previous design in terms of structure design, interconnection networks (including topologies, flow control and routing), content management (with special interest in hardware/software content allocation policies), and structure sharing. In CMP environments (chip multiprocessors) with parallel workloads, coherence plays an important role, and must be taken into consideration.

Sign in / Sign up

Export Citation Format

Share Document