scholarly journals Impact of Process Variations and Defects on RF Front-end in Nanoscale CMOS

Author(s):  
Yuntao Liu ◽  
Aoyang Zhang ◽  
Xiangchong Liu
2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Mohammad Alibakhshikenari ◽  
Bal S. Virdee ◽  
Leyre Azpilicueta ◽  
Chan H. See ◽  
Raed Abd-Alhameed ◽  
...  

AbstractMatching the antenna’s impedance to the RF-front-end of a wireless communications system is challenging as the impedance varies with its surround environment. Autonomously matching the antenna to the RF-front-end is therefore essential to optimize power transfer and thereby maintain the antenna’s radiation efficiency. This paper presents a theoretical technique for automatically tuning an LC impedance matching network that compensates antenna mismatch presented to the RF-front-end. The proposed technique converges to a matching point without the need of complex mathematical modelling of the system comprising of non-linear control elements. Digital circuitry is used to implement the required matching circuit. Reliable convergence is achieved within the tuning range of the LC-network using control-loops that can independently control the LC impedance. An algorithm based on the proposed technique was used to verify its effectiveness with various antenna loads. Mismatch error of the technique is less than 0.2%. The technique enables speedy convergence (< 5 µs) and is highly accurate for autonomous adaptive antenna matching networks.


2021 ◽  
Vol 11 (2) ◽  
pp. 22
Author(s):  
Umberto Ferlito ◽  
Alfio Dario Grasso ◽  
Michele Vaiana ◽  
Giuseppe Bruno

Charge-Based Capacitance Measurement (CBCM) technique is a simple but effective technique for measuring capacitance values down to the attofarad level. However, when adopted for fully on-chip implementation, this technique suffers output offset caused by mismatches and process variations. This paper introduces a novel method that compensates the offset of a fully integrated differential CBCM electronic front-end. After a detailed theoretical analysis of the differential CBCM topology, we present and discuss a modified architecture that compensates mismatches and increases robustness against mismatches and process variations. The proposed circuit has been simulated using a standard 130-nm technology and shows a sensitivity of 1.3 mV/aF and a 20× reduction of the standard deviation of the differential output voltage as compared to the traditional solution.


Sign in / Sign up

Export Citation Format

Share Document