scholarly journals 2D DISTURBANCE MAP OF LOW-POWER FRONT-END CIRCUITS IN LOW FREQUENCY BAND

2019 ◽  
Vol 92 ◽  
pp. 87-100
Author(s):  
Grzegorz Oleszek
Author(s):  
Ow Tze Weng ◽  
Suhaila Isaak ◽  
Yusmeeraz Yusof

The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip is increasing in exponential way, the front-end electrocardiogram (ECG) amplifiers are still suffering from flicker noise for low frequency cardiac signal acquisition, 50Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a CMOS based ECG amplifier that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using  0.13µm CMOS technology from Silterra, the simulation results show that this front-end circuit can achieve a very low input referred noise of  1pV/Hz1/2 and high common mode rejection ratio of 174.05dB. It also gives voltage gain of 75.45dB with good power supply rejection ratio of 92.12dB. The total power consumption is only 3µW and thus suitable to be implemented with further signal processing and classification back end for low power wearable biomedical device.<br /><br />


Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1797
Author(s):  
Yuekai Liu ◽  
Zhijun Zhou ◽  
Yixin Zhou ◽  
Wenyuan Li ◽  
Zhigong Wang

The low-frequency and low-amplitude characteristics of neural signals poses challenges to neural signals recording. A low noise amplifier (LNA) plays an important role in the recording front-end. A chopper-stabilized analog front-end amplifier (FEA) for neural signal acquisition is presented in this paper. It solves the noise and offset interference caused by the servo loop in the chopper amplifier structure. The proposed FEA employs a switched-capacitor (SC) integrator with offset and low-frequency noise compensation. Moreover, a dc-blocking impedance is placed for ripple-rejection (RR), and a positive feedback loop is employed to increase input impedance. The proposed circuit is design in a 0.18-µm 1.8-V CMOS process. It achieves a bandwidth of up to 9 kHz for local field potential and action potential signals acquisition. The referred-to-input (RTI) noise is 0.72 µVrms in the 1 Hz~200 Hz frequency band and 3.46 µVrms in the 200 Hz~5 kHz frequency band. The noise effect factor is 0.43 (1 Hz~200 Hz) and 2.08 (200 Hz~5 kHz). CMRR higher than 87 dB and PSRR higher than 85 dB are achieved in the entire pass-band. It consumes a power of 3.96 µW/channel and occupies an area of 0.244 mm2/channel.


2010 ◽  
Vol E93-C (6) ◽  
pp. 785-795
Author(s):  
Sung-Jin KIM ◽  
Minchang CHO ◽  
SeongHwan CHO
Keyword(s):  
Rfid Tag ◽  

2020 ◽  
Vol E103.C (11) ◽  
pp. 588-596
Author(s):  
Masamune NOMURA ◽  
Yuki NAKAMURA ◽  
Hiroo TARAO ◽  
Amane TAKEI

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