Flexible FPGA based Hardware In the Loop Simulator for Control, Fault-Tolerant and Cyber-Physical Systems

2017 ◽  
Author(s):  
Tim Bakker ◽  
Matthew T. Leccadito ◽  
Robert H. Klenke
Keyword(s):  
Fault Tolerant ◽  
Cyber Physical Systems ◽  
Hardware In The Loop ◽  
Physical Systems

Safety-Critical, Dependable, and Fault-Tolerant Cyber-Physical Systems

2018 ◽  
pp. 54-78
Author(s):  
Guru Prasad Bhandari ◽  
Ratneshwer Gupta
Keyword(s):  
Fault Tolerance ◽  
Fault Tolerant ◽  
Cyber Physical Systems ◽  
General Information ◽  
The Internet ◽  
Physical Systems ◽  
Safety Critical ◽  
Computer Based

Cyber-physical systems (CPSs) are co-engineered integrating with physical and computational components networks. Additionally, a CPS is a mechanism controlled or monitored by computer-based algorithms, tightly interacting with the internet and its users. This chapter presents the definitions relating to dependability, safety-critical and fault-tolerance of CPSs. These definitions are supplemented by other definitions like reliability, availability, safety, maintainability, integrity. Threats to dependability and security like faults, errors, failures are also discussed. Taxonomy of different faults and attacks in CPSs are also presented in this chapter. The main objective of this chapter is to give the general information about secure CPS to the learners for the further enhancement in the field of CPSs.

Evaluating the effects of cyber-attacks on cyber physical systems using a hardware-in-the-loop simulation testbed

2017 ◽  
Author(s):  
Bradley Potteiger ◽  
William Emfinger ◽  
Himanshu Neema ◽  
Xenofon Koutosukos ◽  
CheeYee Tang ◽  
...  
Keyword(s):  
Cyber Physical Systems ◽  
Cyber Attacks ◽  
Hardware In The Loop ◽  
Physical Systems

scholarly journals Hardware-in-the-loop test based non-intrusive diagnostics of cyber-physical systems using microcontroller debug ports

ACTA IMEKO ◽  
2018 ◽  
Vol 7 (1) ◽  
pp. 27
Author(s):  
Balázs Scherer
Keyword(s):  
Measurement Method ◽  
Internal State ◽  
Physical World ◽  
Cyber Physical Systems ◽  
Hardware In The Loop ◽  
Access Port ◽  
Physical Systems ◽  
Testing Phase ◽  
Software Interface ◽  
Novel Approach

<p class="Abstract"><span lang="EN-US">Cyber-physical systems have extensive contact with the physical world. Usually during the development of these systems, the testing phase cannot be done efficiently or safely in the complete real environment, and therefore HIL (Hardware In the Loop) simulators are used. During HIL testing, diagnostic protocols are used very often to gather detailed information about the DUT’s (Device Under Test) internal state. Diagnostic protocols are very useful during testing, but they cause a significant load to the DUT. This paper introduces a novel approach to replace traditional diagnostic protocols with a non-intrusive solution. The presented method is based on the debug capabilities of modern ARM Cortex M core microcontroller, and uses a CMSIS-DAP (Cortex Microcontroller Software Interface Standard Debug - Access Port) based interface. This paper also introduces a solution to integrate this non-intrusive measurement method to NI LabVIEW based test environments and NI VeriStand based HIL simulations. </span></p>

MSYNC: A Generalized Formal Design Pattern for Virtually Synchronous Multirate Cyber-physical Systems

2021 ◽  
Vol 20 (5s) ◽  
pp. 1-26
Author(s):  
Kyungmin Bae ◽  
Peter Csaba Ölveczky
Keyword(s):  
Distributed Control ◽  
Design Pattern ◽  
Design Patterns ◽  
Fault Tolerant ◽  
Cyber Physical Systems ◽  
Distributed Control System ◽  
Physical Systems ◽  
Formal Design ◽  
Special Case

TTA and PALS are two prominent formal design patterns—with different strengths and weaknesses—for virtually synchronous distributed cyber-physical systems (CPSs). They greatly simplify the design and verification of such systems by allowing us to design and verify their underlying synchronous designs. In this paper we introduce and verify MSYNC as a formal design (and verification) pattern/synchronizer for hierarchical multirate CPSs that generalizes, and combines the advantages of, both TTA and (single-rate and multirate) PALS. We also define an extension of TTA to multirate CPSs as a special case. We show that MSYNC outperforms both TTA and PALS in terms of allowing shorter periods, and illustrate the MSYNC design and verification approach with a case study on a fault-tolerant distributed control system for turning an airplane.

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